component
LMR14050SDDAR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLMR14050SDDAR
Texas Instruments · DC-DC Converters · SOIC-8-EP
LMR14050SDDAR from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | output | Bootstrap capacitor connection for high-side MOSFET gate driver; connect 0.1μF capacitor between BOOT and SW to generate gate drive voltage. |
| 2 | VIN | power_in | Power supply input (4V to 40V) with bypass capacitor CIN; path from VIN to CIN and GND must be as short as possible. |
| 3 | EN | input | Enable pin with internal pull-up current source; pull below 1.2V to disable device or leave floating/connect to VIN to enable operation. |
| 4 | RT/SYNC | input | Timing resistor or external clock input (0V to 3.3V); sets switching frequency via external resistor (200kHz to 2.5MHz) or synchronizes to external clock (250kHz to 2.3MHz). |
| 5 | FB | input | Feedback input pin (0V to 5.5V) connected to output voltage divider for setting VOUT; internal voltage reference is 0.75V. |
| 6 | SS | output | Soft-start control pin; connect external capacitor to set soft-start time with internal 3μA charging current. |
| 7 | GND | power_in | System ground reference and return path for all device currents. |
| 8 | SW | output | Switching output node (−1V to 40V) internally connected to low-side MOSFET; connects to power inductor and transitions between VIN and ground. |
| 9 | Thermal Pad | power_in | Exposed thermal pad providing primary heat dissipation path for die; must be connected to ground plane on PCB. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
LMR14050SDDAR - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
lmr14050sddar-etched.step/lmr14050sddar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmr14050sddar.step/lmr14050sddar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
9e9750380623d4ad, retrieved 2026-09-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).