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TPS25833QWRHBTQ1

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Texas Instruments Power Distribution Switches, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps25833qwrhbtq1factory-2.0.0extractor-text
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Contents

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TPS25833QWRHBTQ1

Texas Instruments · Power Distribution Switches · VQFN-32-EP(5x5)

TPS25833QWRHBTQ1 from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply voltage from 4.5V to 36V with high-quality bypass capacitor required.
2 IN power_in Input supply voltage from 4.5V to 36V with high-quality bypass capacitor required.
3 IN power_in Input supply voltage from 4.5V to 36V with high-quality bypass capacitor required.
4 EN/UVLO input Enable/Under-Voltage Lock-Out control input; high enables operation, low disables; can be tied to VIN or controlled externally with adjustable precision threshold.
5 CTRL1 input Logic-level control input for device mode configuration; voltage range 0 to VCC.
6 CTRL2 input Logic-level control input for device mode configuration; voltage range 0 to VCC.
7 THERM_WARN output Active-LOW open-drain output asserted when NTC pin voltage exceeds thermal warning threshold of 0.5 × VCC typical.
8 NTC input Analog input for negative temperature coefficient resistor divider to monitor external PCB temperature and enable user-programmable thermal protection; 0 to VCC range.
9 RT/SYNC input Resistor timing terminal for switching frequency setting (300 kHz to 2.3 MHz) or external clock synchronization input.
10 LS_GD output NMOS gate driver output for external current-limit FET; sources 3 µA typical and sinks 35 µA typical during overcurrent condition.
11 IMON input Analog input for external resistor setting maximum cable compensation voltage at full load current; typical range 0 to 20 kΩ.
12 ILIMIT input Analog input for external resistor setting programmable current-limit threshold; typical range 0 to 100 kΩ.
13 CSN/OUT output Buck regulator output node and negative input to current sense amplifier; regulated at 5.10V ±1% under normal operation.
14 CSP input Positive input to high-side current sense amplifier for load current monitoring; maximum continuous input current 200 µA.
15 BUS input VBUS discharge input with overvoltage protection threshold at 7.0V typical; connect directly to USB Type-C connector VBUS pin.
16 AGND power_in Analog ground terminal serving as reference for internal logic and analog circuits; connect to system ground and PGND.
17 DM_IN input USB DM data line input with overvoltage protection threshold at 3.9V typical; connect to Type-C connector DM pin.
18 DP_IN input USB DP data line input with overvoltage protection threshold at 3.9V typical; connect to Type-C connector DP pin.
19 CC2 bidirectional Type-C configuration channel analog input/output supporting UFP detection, VCONN supply with external 500 mA LDO, and sourcing current of 80 µA typical.
20 CC1 bidirectional Type-C configuration channel analog input/output supporting UFP detection, VCONN supply with external 500 mA LDO, and sourcing current of 80 µA typical.
21 VCC power_out Internal LDO bias supply output regulated to 5.0V (4.75V to 5.25V) with maximum load of 5 mA; requires 2.2 µF bypass capacitor.
22 POL output Active-LOW open-drain output indicating cable plug orientation; asserted when CC2 detects UFP connection (reverse polarity), Hi-Z when CC1 connected.
23 LD_DET output Active-LOW open-drain output asserted when Type-C UFP is identified on CC lines with valid pull-down resistor detected.
24 FAULT output Active-LOW open-drain output asserted during fault conditions including overcurrent, overvoltage, thermal shutdown, and VCONN overload.
25 PGND power_in Power ground terminal for buck converter output current return path with low-inductance connection to system ground and AGND.
26 PGND power_in Power ground terminal for buck converter output current return path with low-inductance connection to system ground and AGND.
27 PGND power_in Power ground terminal for buck converter output current return path with low-inductance connection to system ground and AGND.
28 SW output Buck regulator switching output node connected to power inductor; voltage swing from 0V to VIN.
29 SW output Buck regulator switching output node connected to power inductor; voltage swing from 0V to VIN.
30 SW output Buck regulator switching output node connected to power inductor; voltage swing from 0V to VIN.
31 SW output Buck regulator switching output node connected to power inductor; voltage swing from 0V to VIN.
32 BOOT power_out Bootstrap regulator output for high-side FET gate drive; connect 100 nF ceramic capacitor from BOOT to SW pin with sustained voltage 0V to 6V.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32-EP(5x5)
Category Power Management (PMIC)
Pins 33

CAD (KiCad official)

  • Symbol: TPS25833QWRHBTQ1
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: tps25833qwrhbtq1-etched.step / tps25833qwrhbtq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps25833qwrhbtq1.step / tps25833qwrhbtq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (78 pp, sha256 e6928187076221a2, retrieved 2026-09-24, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF