XB8089D0 from XySemi, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VM	bidirectional	Negative terminal of the battery pack (B-/load side). The internal FET switch connects this terminal to GND during normal operation. Pins 1-4 are internally tied together and carry the pack current through the integrated MOSFETs.
2	VM	bidirectional	Negative terminal of the battery pack (B-/load side). Internally connected to the source of the integrated protection MOSFETs; tie to pins 1, 3, 4 externally.
3	VM	bidirectional	Negative terminal of the battery pack (B-/load side). Internally connected to the source of the integrated protection MOSFETs; tie to pins 1, 2, 4 externally.
4	VM	bidirectional	Negative terminal of the battery pack (B-/load side). Internally connected to the source of the integrated protection MOSFETs; tie to pins 1, 2, 3 externally.
5	GND	power_in	Ground reference. Connect the negative terminal of the battery cell (BAT-) to this pin. Pins 5, 7 and 8 are internally tied and share the ground return.
6	VDD	power_in	Power supply pin. Connect through a 1 kΩ resistor (typical) and a 0.1 µF bypass capacitor to the positive terminal of the battery cell (BAT+). Absolute max −0.3 V to +6 V.
7	GND	power_in	Ground reference. Tied internally to pins 5 and 8; connect to BAT-.
8	GND	power_in	Ground reference. Tied internally to pins 5 and 7; connect to BAT-.
9	EPAD	power_in	Exposed thermal pad on the underside of the SOP8-PP package. Must be soldered to the GND copper pour for thermal dissipation of the integrated MOSFETs.

Key specifications

Parameter	Value
Manufacturer	XySemi
Package	SOP-8-EP
Category	PMIC
Pins	9

Ordering variants

Same part, different packaging or reel option.

XB8089D0

CAD (KiCad official)

Symbol: XB8089D0
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
3D model: SOP-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`xb8089d0.step`	193 KB	You want the bare part, or you mark your own boards.
`xb8089d0-etched.step`	2.0 MB	You want the part with `XB8089D0` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 479 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XySemi datasheet (12 pp, sha256 85596e0e8a7846b1, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF