LT8616EFE#TRPBF from Analog Devices, in a HTSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	EN/UV2	input	Channel 2 enable/undervoltage input with 1.03V rising threshold (0.98V falling) that disables channel 2 when low; tie to VIN if unused and do not float.
2	PG2	output	Open-drain power-good output for channel 2 that stays low until FB2 is within ±10% of final regulation and no fault exists (42V max).
3	SW2	output	Channel 2 switch output connecting to the inductor and boost capacitor; keep the SW node small on the PCB.
4	SW2	output	Channel 2 switch output connecting to the inductor and boost capacitor; keep the SW node small on the PCB.
5	SW2	output	Channel 2 switch output connecting to the inductor and boost capacitor; keep the SW node small on the PCB.
6	BOOST2	passive	Channel 2 top-switch drive supply; place a 0.1µF capacitor between BOOST2 and SW2 close to the IC (4V max above SW2).
7	NC	unconnected	No internal connection; float to increase fault tolerance or connect to ground to help PCB layout.
8	BOOST1	passive	Channel 1 top-switch drive supply; place a 0.1µF capacitor between BOOST1 and SW1 close to the IC (4V max above SW1).
9	SW1	output	Channel 1 switch output connecting to the inductor and boost capacitor; keep the SW node small on the PCB.
10	SW1	output	Channel 1 switch output connecting to the inductor and boost capacitor; keep the SW node small on the PCB.
11	PG1	output	Open-drain power-good output for channel 1 that stays low until FB1 is within ±10% of final regulation and no fault exists (42V max).
12	TR/SS1	input	Channel 1 soft-start/tracking pin with 2µA pull-up from INTVCC; a capacitor sets the ramp, and below 0.79V FB1 regulates to this voltage (4V max).
13	FB1	input	Channel 1 feedback input regulated to 0.790V; connect the feedback resistor divider tap and a phase-lead capacitor (1.5pF to 10pF) to VOUT1.
14	FB1	input	Channel 1 feedback input regulated to 0.790V; connect the feedback resistor divider tap and a phase-lead capacitor (1.5pF to 10pF) to VOUT1.
15	RT	passive	A resistor from RT to ground sets the switching frequency (200kHz to 3MHz).
16	EN/UV1	input	Channel 1 enable/undervoltage input with 1.03V rising threshold (0.98V falling) that disables channel 1 when low; tie to VIN if unused and do not float.
17	SYNC/MODE	input	Ground for low-ripple Burst Mode operation, tie to an external clock (250kHz to 3MHz) to synchronize, or apply 2.4V or higher/INTVCC for pulse-skipping mode; do not float (6V max).
18	NC	unconnected	No internal connection; float to increase fault tolerance or connect to ground to help PCB layout.
19	VIN1	power_in	Supplies internal circuitry and the channel 1 top switch; must be locally bypassed and connected to 3.4V or above even if only channel 2 is used (42V max).
20	NC	unconnected	No internal connection; float to increase fault tolerance or connect to ground to help PCB layout.
21	INTVCC	power_out	Internal regulator output powering gate drivers and control circuits; decouple with at least 1µF low-ESR ceramic to ground and do not load externally.
22	BIAS	power_in	Supplies the internal regulator when above 3.1V; tie to VOUT for outputs of 3.3V and above, use a 1µF bypass if from another supply, ground if unused (30V max).
23	NC	unconnected	No internal connection; float to increase fault tolerance or connect to ground to help PCB layout.
24	VIN2	power_in	Supplies the channel 2 top switch; must be locally bypassed, and VIN1 must be 3.4V or above for channel 2 to operate (42V max).
25	NC	unconnected	No internal connection; float to increase fault tolerance or connect to ground to help PCB layout.
26	FB2	input	Channel 2 feedback input regulated to 0.790V; connect the feedback resistor divider tap and a phase-lead capacitor (1.5pF to 10pF) to VOUT2.
27	FB2	input	Channel 2 feedback input regulated to 0.790V; connect the feedback resistor divider tap and a phase-lead capacitor (1.5pF to 10pF) to VOUT2.
28	TR/SS2	input	Channel 2 soft-start/tracking pin with 2µA pull-up from INTVCC; a capacitor sets the ramp, and below 0.79V FB2 regulates to this voltage (4V max).
29	GND	power_in	Exposed pad and the only ground connection of the TSSOP package; must be soldered to the PCB ground plane and connected to the negative terminal of the input capacitors.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	HTSSOP-28-EP
Category	Power Management ICs
Pins	29

CAD (KiCad official)

Symbol: LT8616EFE#TRPBF
Footprint: Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm
3D model: HTSSOP-28-EP (KiCad packages3D, STEP)
3D model files: lt8616efe-trpbf-etched.step / lt8616efe-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt8616efe-trpbf.step / lt8616efe-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (26 pp, sha256 3030e15d0ddb3890, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

LT8616EFE#TRPBF

Verified LT8616EFE#TRPBF

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README

LT8616EFE#TRPBF

Pinout

Key specifications

CAD (KiCad official)

Provenance