Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

TPS76825QD

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

TPS76825QD from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Regulator ground pin, which is the common return for the regulator.
2 EN input Enable input; a TTL high signal shuts the regulator down and EN should be tied to ground if the shutdown feature is not used.
3 IN power_in Input voltage pin; the datasheet's recommended input range is 2.7 V to 10 V, with VIN at least VOUT + VDO or 2.7 V, whichever is greater. Pins 3 and 4 are both IN.
4 IN power_in Input voltage pin; the datasheet's recommended input range is 2.7 V to 10 V, with VIN at least VOUT + VDO or 2.7 V, whichever is greater. Pins 3 and 4 are both IN.
5 OUT power_out Regulated output voltage pin; a capacitor of at least 10 µF with ESR between 60 mΩ and 1.5 Ω is required between OUT and GND.
6 OUT power_out Regulated output voltage pin; a capacitor of at least 10 µF with ESR between 60 mΩ and 1.5 Ω is required between OUT and GND. Pins 5 and 6 are both OUT.
7 FB/NC unconnected Feedback input for the adjustable version only; on the fixed-output TPS76825 it is a no-connect pin.
8 PG output Open-drain power-good output that goes low when the output falls to between 92% and 98% of nominal and requires an external pullup resistor, or can be left floating if unused.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TPS76825QD
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tps76825qd-etched.step / tps76825qd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps76825qd.step / tps76825qd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 742896d0a1cf7766, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF