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AT91SAM7SE512B-CU

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Microchip Tech Pre-ordered MCUs, LFBGA-144. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Changed since verified AT91SAM7SE512B-CU

by Ray · last 31 Oct 2026 · 1 record · files changed since
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Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 144 pinschanged since
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  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AT91SAM7SE512B-CU · LFBGA-144 · 144 pins
  • ✓copper: 144 copper pads, none touching another net
  • ✓datasheet: all 144 pin names found in the 47-page datasheet
  • ✓distributor: lcsc C612483, digikey AT91SAM7SE512B-CU-ND, mouser 556-AT91SAM7SE512BCU
  • ✓family: LFBGA-144_10x10mm_Layout12x12_P0.8mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-bfd1k1l0/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 144 pins = 144 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 144 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files! at91sam7se512b-cu.kicad_sym✓ at91sam7se512b-cu.kicad_mod✓ at91sam7se512b-cu.step
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Contents

README

markdown

AT91SAM7SE512B-CU

Microchip Tech · Pre-ordered MCUs · LFBGA-144

AT91SAM7SE512B-CU from Microchip Tech, in a LFBGA-144. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
A1 PB7 bidirectional PIO controller port B line 7 general-purpose I/O.
A2 PB8 bidirectional PIO controller port B line 8 general-purpose I/O.
A3 PB9 bidirectional PIO controller port B line 9 general-purpose I/O.
A4 PB12 bidirectional PIO controller port B line 12 general-purpose I/O.
A5 PB13 bidirectional PIO controller port B line 13 general-purpose I/O.
A6 PB16 bidirectional PIO controller port B line 16 general-purpose I/O.
A7 PB22 bidirectional PIO controller port B line 22 general-purpose I/O.
A8 PB23 bidirectional PIO controller port B line 23 general-purpose I/O.
A9 PB25 bidirectional PIO controller port B line 25 general-purpose I/O.
A10 PB29 bidirectional PIO controller port B line 29 general-purpose I/O.
A11 PB30 bidirectional PIO controller port B line 30 general-purpose I/O.
A12 PB31 bidirectional PIO controller port B line 31 general-purpose I/O.
B1 PB6 bidirectional PIO controller port B line 6 general-purpose I/O.
B2 PB3 bidirectional PIO controller port B line 3 general-purpose I/O.
B3 PB4 bidirectional PIO controller port B line 4 general-purpose I/O.
B4 PB10 bidirectional PIO controller port B line 10 general-purpose I/O.
B5 PB14 bidirectional PIO controller port B line 14 general-purpose I/O.
B6 PB18 bidirectional PIO controller port B line 18 general-purpose I/O.
B7 PB20 bidirectional PIO controller port B line 20 general-purpose I/O.
B8 PB24 bidirectional PIO controller port B line 24 general-purpose I/O.
B9 PB28 bidirectional PIO controller port B line 28 general-purpose I/O.
B10 PA4/PGMNCMD bidirectional PIO port A line 4, also fast flash programming command pin PGMNCMD.
B11 PA0/PGMEN0 bidirectional PIO port A line 0, also fast flash programming mode select PGMEN0.
B12 PA1/PGMEN1 bidirectional PIO port A line 1, also fast flash programming mode select PGMEN1.
C1 PB0 bidirectional PIO controller port B line 0 general-purpose I/O.
C2 PB1 bidirectional PIO controller port B line 1 general-purpose I/O.
C3 PB5 bidirectional PIO controller port B line 5 general-purpose I/O.
C4 PB11 bidirectional PIO controller port B line 11 general-purpose I/O.
C5 PB15 bidirectional PIO controller port B line 15 general-purpose I/O.
C6 PB19 bidirectional PIO controller port B line 19 general-purpose I/O.
C7 PB21 bidirectional PIO controller port B line 21 general-purpose I/O.
C8 PB27 bidirectional PIO controller port B line 27 general-purpose I/O.
C9 PA6/PGMNOE bidirectional PIO port A line 6, also fast flash programming output enable PGMNOE.
C10 PA5/PGMRDY bidirectional PIO port A line 5, also fast flash programming ready signal PGMRDY.
C11 PA2/PGMEN2 bidirectional PIO port A line 2, also fast flash programming mode select PGMEN2.
C12 PA3 bidirectional PIO controller port A line 3 general-purpose I/O.
D1 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
D2 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
D3 PB2 bidirectional PIO controller port B line 2 general-purpose I/O.
D4 TDO output JTAG test data output.
D5 TDI input JTAG test data input.
D6 PB17 bidirectional PIO controller port B line 17 general-purpose I/O.
D7 PB26 bidirectional PIO controller port B line 26 general-purpose I/O.
D8 PA14/PGMD2 bidirectional PIO port A line 14, also fast flash programming data bit PGMD2.
D9 PA12/PGMD0 bidirectional PIO port A line 12, also fast flash programming data bit PGMD0.
D10 PA11/PGMM3 bidirectional PIO port A line 11, also fast flash programming mode bit PGMM3.
D11 PA8/PGMM0 bidirectional PIO port A line 8, also fast flash programming mode bit PGMM0.
D12 PA7/PGMNVALID bidirectional PIO port A line 7, also fast flash programming data valid signal PGMNVALID.
E1 PC22 bidirectional PIO controller port C line 22 general-purpose I/O.
E2 PC23 bidirectional PIO controller port C line 23 general-purpose I/O.
E3 NRST bidirectional Microcontroller reset pin, driven by the reset controller which shapes the reset pulse.
E4 TCK input JTAG test clock input.
E5 ERASE input Flash and NVM configuration bits erase command input.
E6 TEST input Test mode select pin.
E7 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
E8 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
E9 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
E10 PA9/PGMM1 bidirectional PIO port A line 9, also fast flash programming mode bit PGMM1.
E11 PA10/PGMM2 bidirectional PIO port A line 10, also fast flash programming mode bit PGMM2.
E12 PA13/PGMD1 bidirectional PIO port A line 13, also fast flash programming data bit PGMD1.
F1 PC21 bidirectional PIO controller port C line 21 general-purpose I/O.
F2 PC20 bidirectional PIO controller port C line 20 general-purpose I/O.
F3 PC19 bidirectional PIO controller port C line 19 general-purpose I/O.
F4 JTAGSEL input JTAG interface selection input.
F5 TMS input JTAG test mode select input.
F6 VDDIO power_in I/O line supply, 3.0V to 3.6V or 1.65V to 1.95V.
F7 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
F8 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
F9 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
F10 AD5 input ADC analog input channel 5; connect to GND if the ADC is not used.
F11 PA15/PGMD3 bidirectional PIO port A line 15, also fast flash programming data bit PGMD3.
F12 PA16/PGMD4 bidirectional PIO port A line 16, also fast flash programming data bit PGMD4.
G1 PC18 bidirectional PIO controller port C line 18 general-purpose I/O.
G2 PC16 bidirectional PIO controller port C line 16 general-purpose I/O.
G3 PC17 bidirectional PIO controller port C line 17 general-purpose I/O.
G4 PC9 bidirectional PIO controller port C line 9 general-purpose I/O.
G5 VDDIO power_in I/O line supply, 3.0V to 3.6V or 1.65V to 1.95V.
G6 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
G7 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
G8 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
G9 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
G10 AD4 input ADC analog input channel 4; connect to GND if the ADC is not used.
G11 VDDIN power_in Powers the voltage regulator and the ADC, 3.0V to 3.6V (3.3V nominal).
G12 VDDOUT power_out Output of the 1.8V voltage regulator; needs decoupling capacitors, leave unconnected if regulator is unused.
H1 PC15 bidirectional PIO controller port C line 15 general-purpose I/O.
H2 PC14 bidirectional PIO controller port C line 14 general-purpose I/O.
H3 PC13 bidirectional PIO controller port C line 13 general-purpose I/O.
H4 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
H5 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
H6 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
H7 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
H8 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
H9 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
H10 PA19/PGMD7/AD2 bidirectional PIO port A line 19, also fast flash programming data bit PGMD7 and ADC input AD2.
H11 PA20/PGMD8/AD3 bidirectional PIO port A line 20, also fast flash programming data bit PGMD8 and ADC input AD3.
H12 VDDIO power_in I/O line supply, 3.0V to 3.6V or 1.65V to 1.95V.
J1 PC12 bidirectional PIO controller port C line 12 general-purpose I/O.
J2 PC10 bidirectional PIO controller port C line 10 general-purpose I/O.
J3 PA30 bidirectional PIO controller port A line 30 general-purpose I/O.
J4 PA28 bidirectional PIO controller port A line 28 general-purpose I/O.
J5 PA23/PGMD11 bidirectional PIO port A line 23, also fast flash programming data bit PGMD11.
J6 PA22/PGMD10 bidirectional PIO port A line 22, also fast flash programming data bit PGMD10.
J7 AD6 input ADC analog input channel 6; connect to GND if the ADC is not used.
J8 AD7 input ADC analog input channel 7; connect to GND if the ADC is not used.
J9 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
J10 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
J11 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
J12 VDDIO power_in I/O line supply, 3.0V to 3.6V or 1.65V to 1.95V.
K1 PC11 bidirectional PIO controller port C line 11 general-purpose I/O.
K2 PC6 bidirectional PIO controller port C line 6 general-purpose I/O.
K3 PC2 bidirectional PIO controller port C line 2 general-purpose I/O.
K4 PC0 bidirectional PIO controller port C line 0 general-purpose I/O.
K5 PA27/PGMD15 bidirectional PIO port A line 27, also fast flash programming data bit PGMD15.
K6 PA26/PGMD14 bidirectional PIO port A line 26, also fast flash programming data bit PGMD14.
K7 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
K8 VDDCORE power_in Core logic supply, 1.65V to 1.95V (1.8V typical), required for device and Flash operation.
K9 VDDFLASH power_in Powers USB transceivers and part of the Flash, 3.0V to 3.6V (3.3V nominal), required for Flash operation.
K10 VDDIO power_in I/O line supply, 3.0V to 3.6V or 1.65V to 1.95V.
K11 VDDIO power_in I/O line supply, 3.0V to 3.6V or 1.65V to 1.95V.
K12 PA18/PGMD6/AD1 bidirectional PIO port A line 18, also fast flash programming data bit PGMD6 and ADC input AD1.
L1 SDCK output SDRAM clock output, tied low after reset.
L2 PC7 bidirectional PIO controller port C line 7 general-purpose I/O.
L3 PC4 bidirectional PIO controller port C line 4 general-purpose I/O.
L4 PC1 bidirectional PIO controller port C line 1 general-purpose I/O.
L5 PA29 bidirectional PIO controller port A line 29 general-purpose I/O.
L6 PA24/PGMD12 bidirectional PIO port A line 24, also fast flash programming data bit PGMD12.
L7 PA21/PGMD9 bidirectional PIO port A line 21, also fast flash programming data bit PGMD9.
L8 ADVREF power_in ADC reference voltage; connect to GND if the ADC is not used.
L9 VDDFLASH power_in Powers USB transceivers and part of the Flash, 3.0V to 3.6V (3.3V nominal), required for Flash operation.
L10 VDDFLASH power_in Powers USB transceivers and part of the Flash, 3.0V to 3.6V (3.3V nominal), required for Flash operation.
L11 PA17/PGMD5/AD0 bidirectional PIO port A line 17, also fast flash programming data bit PGMD5 and ADC input AD0.
L12 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
M1 PC8 bidirectional PIO controller port C line 8 general-purpose I/O.
M2 PC5 bidirectional PIO controller port C line 5 general-purpose I/O.
M3 PC3 bidirectional PIO controller port C line 3 general-purpose I/O.
M4 PA31 bidirectional PIO controller port A line 31 general-purpose I/O.
M5 PA25/PGMD13 bidirectional PIO port A line 25, also fast flash programming data bit PGMD13.
M6 DM bidirectional USB device port data minus line.
M7 DP bidirectional USB device port data plus line.
M8 GND power_in Ground; no separate grounds per supply, connect to the system ground plane as short as possible.
M9 XIN/PGMCK input Main oscillator input (3 to 20 MHz), also fast flash programming clock PGMCK.
M10 XOUT output Main oscillator output.
M11 PLLRC passive PLL filter RC network connection pin.
M12 VDDPLL power_in Powers the oscillator and the PLL; can be connected directly to VDDOUT.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package LFBGA-144
Category Embedded Processors & Controllers
Pins 144

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating temperature range (Industrial) -40 85 °C AT91SAM7SE512B-CU, LFBGA144, Industrial 45
Brownout detector threshold VDDCORE (accuracy ±2%) Vbot18 1.68 V typical value, factory calibrated, accuracy ± 2% 30
Brownout detector threshold VDDFLASH (accuracy ±3.5%) Vbot33 2.8 V typical value, factory calibrated, accuracy ± 3.5% 30
Brownout detector static current (enabled) 20 µA less than 20 µA, brownout detector enabled 30
Brownout detector static current (deactivated) 1 µA less than 1 µA, brownout detector deactivated 30
Total current drawn by all I/O lines 300 mA cannot exceed 300 mA 16
Current per I/O line PA0 to PA3 (high-drive) 16 mA each line can drive up to 16 mA permanently 16
Current per remaining I/O line 8 mA remaining I/O lines 16
SDCK maximum output frequency at 3.0V 48 MHz 3.0V, maximum load 30 pF 16
SDCK maximum output frequency at 1.65V 25 MHz 1.65V, maximum load 30 pF 16
RC oscillator frequency 22 42 KHz 30
Main oscillator frequency 3 20 MHz 31
PLL output frequency 80 220 MHz 31
Brownout detector hysteresis hyst 50 mV about 50 mV, VDDCORE and VDDFLASH 30
Power-on reset threshold 1.5 V limited-accuracy threshold at around 1.5V 30
Pull-up resistor on I/O lines 100 kΩ typical pull-up value 16
NRST pull-up resistor 100 kΩ about 100 kΩ to VDDIO 15
Pull-down resistor on JTAGSEL, TST, ERASE 15 kΩ about 15 kΩ 15
Flash page programming time 6 ms including page auto-erase 1
Flash full erase time 15 ms 1
Flash erase cycles 10000 cycles 1
Flash data retention 10 years 1
Flash single cycle access frequency 30 MHz worst case conditions 1
VDDOUT output capacitor 2.2 µF X7R, 2.2 µF (or 3.3 µF) between VDDOUT and GND 14

CAD (KiCad official)

  • Symbol: AT91SAM7SE512B-CU
  • Footprint: Package_BGA:LFBGA-144_10x10mm_Layout12x12_P0.8mm
  • 3D model: LFBGA-144 (KiCad packages3D, STEP)
  • 3D model files: at91sam7se512b-cu-etched.step / at91sam7se512b-cu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at91sam7se512b-cu.step / at91sam7se512b-cu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (47 pp, sha256 fc14e212ea7d936a, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF