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STM8S105K6T3C
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM8S105K6T3C
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM8S105K6T3C from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NRST | bidirectional | Reset pin with internal weak pull-up; used to generate device reset when driven to low level or released after power-up. |
| 2 | PA1/OSC IN | bidirectional | Port A pin 1 / Oscillator input; can function as general purpose I/O or external crystal/clock input for HSE clock source. |
| 3 | PA2/OSC OUT | bidirectional | Port A pin 2 / Oscillator output; can function as general purpose I/O or crystal feedback output for HSE oscillator. |
| 4 | VSS | power_in | Digital ground; power supply return path for all digital circuits. |
| 5 | VCAP | passive | Internal 1.8 V regulator capacitor connection; 100 nF to 1 µF external capacitor should be connected to ground. |
| 6 | VDD | power_in | Digital power supply; operating voltage range 2.95 V to 5.5 V. |
| 7 | VDDIO_1 | power_in | I/O power supply; 2.95 V to 5.5 V operating supply for I/O pins on side 1 of the package. |
| 8 | PF4/AIN12 | bidirectional | Port F pin 4 / Analog input 12; functions as general purpose I/O or ADC analog input channel 12, not selectable in ADC scan mode. |
| 9 | VDDA | power_in | Analog power supply; 2.95 V to 5.5 V operating supply for ADC and analog circuits. |
| 10 | VSSA | power_in | Analog ground; power supply return for ADC and analog circuits. |
| 11 | PB5/AIN5[I2C_SDA] | bidirectional | Port B pin 5 / Analog input 5 / I2C serial data; functions as general purpose I/O, ADC analog input, or I2C SDA when AFR6 remapping is enabled. |
| 12 | PB4/AIN4[I2C_SCL] | bidirectional | Port B pin 4 / Analog input 4 / I2C serial clock; functions as general purpose I/O, ADC analog input, or I2C SCL when AFR6 remapping is enabled. |
| 13 | PB3/AIN3[TIM1_ETR] | bidirectional | Port B pin 3 / Analog input 3 / Timer 1 external trigger; functions as general purpose I/O, ADC analog input, or Timer 1 external trigger input when AFR5 remapping is enabled. |
| 14 | PB2/AIN2[TIM1_CH3N] | bidirectional | Port B pin 2 / Analog input 2 / Timer 1 channel 3 complementary; functions as general purpose I/O, ADC analog input, or Timer 1 complementary channel 3 output when AFR5 remapping is enabled. |
| 15 | PB1/AIN1[TIM1_CH2N] | bidirectional | Port B pin 1 / Analog input 1 / Timer 1 channel 2 complementary; functions as general purpose I/O, ADC analog input, or Timer 1 complementary channel 2 output when AFR5 remapping is enabled. |
| 16 | PB0/AIN0[TIM1_CH1N] | bidirectional | Port B pin 0 / Analog input 0 / Timer 1 channel 1 complementary; functions as general purpose I/O, ADC analog input, or Timer 1 complementary channel 1 output when AFR5 remapping is enabled. |
| 17 | PE5/SPI_NSS | bidirectional | Port E pin 5 / SPI slave select; functions as general purpose I/O or SPI master/slave select input for synchronous communication. |
| 18 | PC1/TIM1_CH1/UART2_CK | bidirectional | Port C pin 1 / Timer 1 channel 1 / UART2 clock; functions as general purpose I/O, Timer 1 PWM output, or UART2 synchronous clock output. |
| 19 | PC2/TIM1_CH2 | bidirectional | Port C pin 2 / Timer 1 channel 2; functions as general purpose I/O or Timer 1 channel 2 PWM/timing output. |
| 20 | PC3/TIM1_CH3 | bidirectional | Port C pin 3 / Timer 1 channel 3; functions as general purpose I/O or Timer 1 channel 3 PWM/timing output. |
| 21 | PC4/TIM1_CH4 | bidirectional | Port C pin 4 / Timer 1 channel 4; functions as general purpose I/O or Timer 1 channel 4 PWM/timing output. |
| 22 | PC5/SPI_SCK | bidirectional | Port C pin 5 / SPI serial clock; functions as general purpose I/O or SPI serial clock for master and slave modes up to 8 Mbit/s. |
| 23 | PC6/SPI_MOSI | bidirectional | Port C pin 6 / SPI master out/slave in; functions as general purpose I/O or SPI data output line for master mode or slave input line for slave mode. |
| 24 | PC7/SPI_MISO | bidirectional | Port C pin 7 / SPI master in/slave out; functions as general purpose I/O or SPI data input line for master mode or slave output line for slave mode. |
| 25 | PD0/TIM3_CH2[TIM1_BKIN][CLK_CCO] | bidirectional | Port D pin 0 / Timer 3 channel 2 / Timer 1 break input / Clock output; functions as general purpose I/O or Timer 3 channel 2 output, remappable to Timer 1 break input (AFR3) or configurable clock output (AFR2). |
| 26 | PD1/SWIM | bidirectional | Port D pin 1 / SWIM data interface; single-wire interface module for debug and flash programming with internal pull-up, usable as general purpose I/O after reset. |
| 27 | PD2/TIM3_CH1[TIM2_CH3] | bidirectional | Port D pin 2 / Timer 3 channel 1 / Timer 2 channel 3; functions as general purpose I/O or Timer 3 channel 1 output, remappable to Timer 2 channel 3 output via AFR1. |
| 28 | PD3/TIM2_CH2[ADC_ETR] | bidirectional | Port D pin 3 / Timer 2 channel 2 / ADC external trigger; functions as general purpose I/O or Timer 2 channel 2 output, remappable to ADC external trigger input via AFR0. |
| 29 | PD4/TIM2_CH1[BEEP] | bidirectional | Port D pin 4 / Timer 2 channel 1 / Beeper output; functions as general purpose I/O or Timer 2 channel 1 output, remappable to beeper audio output via AFR7. |
| 30 | PD5/UART2_TX | bidirectional | Port D pin 5 / UART2 transmit; functions as general purpose I/O or UART2 asynchronous serial transmit output up to 230400 baud. |
| 31 | PD6/UART2_RX | bidirectional | Port D pin 6 / UART2 receive; functions as general purpose I/O or UART2 asynchronous serial receive input up to 230400 baud. |
| 32 | PD7/TLI[TIM1_CH4] | bidirectional | Port D pin 7 / Top level interrupt / Timer 1 channel 4; functions as general purpose I/O or top level interrupt input, remappable to Timer 1 channel 4 output via AFR4. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
STM8S105K6T3C - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm8s105k6t3c-etched.step/stm8s105k6t3c-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm8s105k6t3c.step/stm8s105k6t3c.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (121 pp, sha256
b1007bc27bb78327, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).