component
SN74AUC1G126DCKR
Public Made by Adomby adom
Texas Instruments Buffers / Drivers, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownSN74AUC1G126DCKR
Texas Instruments · Buffers / Drivers · SC-70-5
SN74AUC1G126DCKR from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output enable; the output is disabled when OE is low, and OE should be tied to GND through a pulldown resistor to ensure high-impedance during power up or power down. |
| 2 | A | input | Logic input; the device is 3.6-V I/O tolerant and is designed specifically for 1.65-V to 1.95-V VCC operation, with operation from 0.8-V to 2.7-V VCC. |
| 3 | GND | power_in | Ground reference for the device; OE should be tied to GND through a pulldown resistor when the high-impedance state is required at power up or power down. |
| 4 | Y | output | Single line driver output with a tri-state buffer that is disabled (high-impedance) when OE is low, with ±20-mA continuous output current. |
| 5 | VCC | power_in | Positive supply; the device is operational at 0.8 V to 2.7 V VCC and is designed specifically for 1.65 V to 1.95 V VCC operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SC-70-5 |
| Category | Logic ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 3.6 | V | 4 | ||
| Input voltage | VI | -0.5 | 3.6 | V | 4 | ||
| Voltage applied to any output in high-impedance or power-off state | VO | -0.5 | 3.6 | V | 4 | ||
| Input clamp current | IIK | -50 | mA | VI < 0 | 4 | ||
| Output clamp current | IOK | -50 | mA | VO < 0 | 4 | ||
| Continuous output current | IO | -20 | 20 | mA | 4 | ||
| Continuous current through VCC or GND | -100 | 100 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 0.8 | 2.7 | V | 5 | ||
| Input voltage | VI | 0 | 3.6 | V | 5 | ||
| Output voltage | VO | 0 | V | max = VCC | 5 | ||
| High-level input voltage | VIH | 1.7 | V | VCC = 2.3 V to 2.7 V | 5 | ||
| Low-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V | 5 | ||
| High-level output current | IOH | -8 | mA | VCC = 1.65 V | 5 | ||
| Low-level output current | IOL | 8 | mA | VCC = 1.65 V | 5 | ||
| Input transition rise or fall rate | Δt/Δv | 10 | ns/V | VCC = 1.65 V to 1.95 V | 5 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 252 | °C/W | DCK (SC70), 5 pins | 5 | ||
| High-level output voltage | VOH | 0.55 | V | IOH = -0.7 mA, VCC = 0.8 V | 6 | ||
| High-level output voltage | VOH | 1.2 | V | IOH = -8 mA, VCC = 1.65 V | 6 | ||
| Low-level output voltage | VOL | 0.45 | V | IOL = 8 mA, VCC = 1.65 V | 6 | ||
| Input current | II | -5 | 5 | µA | A or OE input: VI = VCC or GND, VCC = 0 to 2.7 V | 6 | |
| Off-state current | Ioff | -10 | 10 | µA | VI or VO = 2.7 V, VCC = 0 | 6 | |
| High-impedance-state output current | IOZ | -10 | 10 | µA | VO = VCC or GND, VCC = 2.7 V | 6 | |
| Supply current | ICC | 10 | µA | VI = VCC or GND, VCC = 0.8 V to 2.7 V, IO = 0 | 6 | ||
| Input capacitance | Ci | 2.5 | pF | VI = VCC or GND, VCC = 2.5 V | 6 | ||
| Output capacitance | Co | 5.5 | pF | VO = VCC or GND, VCC = 2.5 V | 6 | ||
| Propagation delay time A-to-Y | tpd | 0.6 | 1 | 1.6 | ns | VCC = 1.8 V ± 0.15 V, CL = 15 pF | 7 |
| Enable time OE-to-Y | ten | 0.3 | 0.9 | 1.9 | ns | VCC = 1.8 V ± 0.15 V, CL = 15 pF | 7 |
| Disable time OE-to-Y | tdis | 1.6 | 2.4 | 3.5 | ns | VCC = 1.8 V ± 0.15 V, CL = 15 pF | 7 |
| Propagation delay time A-to-Y | tpd | 1 | 1.5 | 2.5 | ns | VCC = 1.8 V ± 0.15 V, CL = 30 pF | 7 |
| Enable time OE-to-Y | ten | 1.1 | 1.6 | 2.5 | ns | VCC = 1.8 V ± 0.15 V, CL = 30 pF | 7 |
| Disable time OE-to-Y | tdis | 1.3 | 2.6 | 3.1 | ns | VCC = 1.8 V ± 0.15 V, CL = 30 pF | 7 |
| Power dissipation capacitance, inputs disabled | Cpd | 15 | pF | TA = 25°C, f = 10 MHz, VCC = 1.8 V | 7 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | • Updated body size of YZP package. ..................................................................................................................................... 1 • Added junction temperature | 2 |
CAD (KiCad official)
- Symbol:
SN74AUC1G126DCKR - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
sn74auc1g126dckr-etched.step/sn74auc1g126dckr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74auc1g126dckr.step/sn74auc1g126dckr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
fd5cb7424b0d6c55, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).