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Contents

README

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TPS61187RTJR

Texas Instruments · LED Drivers · QFN-20-EP(4x4)

TPS61187RTJR from Texas Instruments, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDDIO power_out Internal pre-regulator output; connect a 1.0 µF ceramic capacitor to VDDIO, which is specified at 3.0 V to 3.6 V (3.3 V typical) at 5 mA load.
2 EN input Enable input with logic-high threshold of 2.1 V minimum and logic-low threshold of 0.8 V maximum, with an internal pull-down of 400 kΩ to 1600 kΩ.
3 FSLCT input Switching frequency selection pin; a resistor on this pin sets the switching frequency between 300 kHz and 1.0 MHz.
4 ISET input Full-scale LED current set pin; a resistor connected to this pin programs the LED current level (ISET voltage 1.229 V typical).
5 FPO output Fault protection output that indicates fault conditions including OVP, OC, and OT; logic-low voltage is 0.4 V maximum at 0.5 mA source current.
6 IFB1 input Regulated LED current sink input; each of the six current sinks is rated 30 mA maximum.
7 IFB2 input Regulated LED current sink input; each of the six current sinks is rated 30 mA maximum.
8 IFB3 input Regulated LED current sink input; each of the six current sinks is rated 30 mA maximum.
9 GND power_in Analog ground of the device.
10 IFB4 input Regulated LED current sink input; each of the six current sinks is rated 30 mA maximum.
11 IFB5 input Regulated LED current sink input; each of the six current sinks is rated 30 mA maximum.
12 IFB6 input Regulated LED current sink input; each of the six current sinks is rated 30 mA maximum.
13 RFPWM/MODE input Dimming frequency program pin set by an external resistor, and mode selection pin; see the Application Information section for details.
14 OVC input Over-voltage clamp pin and voltage feedback pin; see the Application Information section for details.
15 PGND power_in Power ground of the device.
16 SW output Drain connection of the internal power FET; absolute maximum rating is -0.3 V to 40 V.
17 NC unconnected No connection.
18 FAULT output Fault pin used to drive an external isolation FET; voltage range is -0.3 V to 24 V absolute maximum.
19 VIN power_in Supply input pin; operating input voltage range is 4.5 V to 24 V.
20 PWM input PWM signal input for dimming, with logic-high threshold of 2.1 V minimum and logic-low threshold of 0.8 V maximum.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-20-EP(4x4)
Category LED Drivers
Pins 21

CAD (KiCad official)

  • Symbol: TPS61187RTJR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps61187rtjr-etched.step / tps61187rtjr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps61187rtjr.step / tps61187rtjr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 66cb4f8defa22d56, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF