component
PMV40UN2R
Public Made by Adomby adom
Nexperia MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPMV40UN2R
Nexperia · MOSFETs · SOT-23
PMV40UN2R from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal for FET control; gate-source voltage range -12 to 12 V with maximum gate-source leakage current 100 nA at Tj = 25°C. |
| 2 | S | passive | Source terminal; reference terminal and current path for the n-channel MOSFET. |
| 3 | D | passive | Drain terminal; maximum drain-source voltage 30 V and maximum drain current 4.4 A at VGS = 4.5 V, Tamb = 25°C, and pulse duration ≤ 5 s. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
PMV40UN2R - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
pmv40un2r-etched.step/pmv40un2r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pmv40un2r.step/pmv40un2r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (15 pp, sha256
b7c0957007d43364, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).