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TLV75101PDSQT
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-10-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTLV75101PDSQT
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-10-EP(2x2)
TLV75101PDSQT from Texas Instruments, in a WSON-10-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB1 | input | For the adjustable TLV75101, this pin is the control loop error amplifier input that sets the LDO output voltage (for fixed TLV751xxxyyy versions it is not connected internally). |
| 2 | GND | power_in | Ground pin. |
| 3 | EN1 | input | Enable pin for channel 1: drive EN1 above VEN1(HI) to turn the regulator on and below VEN1(LO) to put the LDO into shutdown mode. |
| 4 | GND | power_in | Ground pin. |
| 5 | EN2 | input | Enable pin for channel 2: drive EN2 above VEN2(HI) to turn the LDO on and below VEN2(LO) to put it into shutdown mode. |
| 6 | IN2 | power_in | Input pin for channel 2; use the recommended value or larger ceramic capacitor from IN to ground per the Recommended Operating Conditions table, placed as close to the device as possible. |
| 7 | FB2 | input | For the adjustable TLV75101, this pin is the control loop error amplifier input that sets the LDO output voltage (for fixed TLV751xxxyyy versions it is not connected internally). |
| 8 | OUT2 | power_out | Regulated output voltage pin for channel 2; a capacitor from OUT to ground is required for stability, with COUT between 1 µF and 220 µF per the Recommended Operating Conditions table. |
| 9 | IN1 | power_in | Input pin for channel 1; use the recommended value or larger ceramic capacitor from IN to ground per the Recommended Operating Conditions table, placed as close to the device as possible. |
| 10 | OUT1 | power_out | Regulated output voltage pin for channel 1; a capacitor from OUT to ground is required for stability, with COUT between 1 µF and 220 µF per the Recommended Operating Conditions table. |
| 11 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-10-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 11 |
CAD (KiCad official)
- Symbol:
TLV75101PDSQT - Footprint:
Package_DFN_QFN:Texas_DSQ0010A_WSON-10-1EP_2x2mm_P0.4mm_EP0.9x1.5mm - 3D model: WSON-10-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
tlv75101pdsqt-etched.step/tlv75101pdsqt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv75101pdsqt.step/tlv75101pdsqt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
c4d29cf923e325fc, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).