SP3072EEN-L from MaxLinear, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RO	output	Receiver Output. When RE is low and (A-B) >= -50mV, RO is high; if (A-B) <= -200mV, RO is low. CMOS-level logic output to the host UART/MCU.
2	RE	input	Active-low Receiver Output Enable. When RE is low, RO is enabled; when RE is high, RO is high-impedance. RE high together with DE low places the device in low-power shutdown mode. RE is a hot-swap input.
3	DE	input	Driver Output Enable. When DE is high, the driver outputs (A, B) are enabled; when DE is low, outputs are high-impedance. DE low with RE high enters shutdown mode. DE is a hot-swap input.
4	DI	input	Driver Input. With DE high, a logic-low DI forces the noninverting output (A) low and the inverting output (B) high; a logic-high DI forces A high and B low. CMOS-level input from the host UART/MCU.
5	GND	power_in	Ground reference for the device.
6	A	bidirectional	Noninverting Receiver Input and Noninverting Driver Output (half-duplex bus line A). Connects to the RS-485/RS-422 differential bus; ±15kV HBM ESD-protected. Receiver threshold is -50mV to -200mV vs. B.
7	B	bidirectional	Inverting Receiver Input and Inverting Driver Output (half-duplex bus line B). Connects to the RS-485/RS-422 differential bus; ±15kV HBM ESD-protected.
8	VCC	power_in	Positive supply (3.3V nominal, 6.0V absolute maximum). Bypass VCC to GND with a 0.1 µF ceramic capacitor.

Key specifications

Parameter	Value
Manufacturer	MaxLinear
Package	SOIC-8
Category	Logic
Pins	8

Ordering variants

Same part, different packaging or reel option.

SP3072EEN-L
SP3072EEN-L/TR
SP3072EMN-L/TR
SP3071EEN-L
SP3074EEN-L
SP3077EEN-L
SP3070EEN-L
SP3073EEN-L/TR
SP3076EEN-L

CAD (KiCad official)

Symbol: SP3072EEN-L
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sp3072een-l.step`	122 KB	You want the bare part, or you mark your own boards.
`sp3072een-l-etched.step`	2.0 MB	You want the part with `SP3072EEN-L` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 507 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: MaxLinear datasheet (26 pp, sha256 24efa6b28f4cec32, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF