Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗

Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗

Loads on click. Unloads only if this page sits in the background.

Download PDF

Contents

Pinout
Key specifications
Ordering variants
CAD (KiCad official)
Provenance

README

markdown

TPS25833QWRHBRQ1

Texas Instruments · USB Converters · VQFN-32(5x5)

TPS25833QWRHBRQ1 from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN	power_in	Input supply to the buck regulator (4.5V to 36V). One of three parallel IN pins; connect all IN pins together and place high-quality bypass capacitors directly to PGND.
2	IN	power_in	Input supply to the buck regulator (4.5V to 36V). One of three parallel IN pins; connect all IN pins together and place high-quality bypass capacitors directly to PGND.
3	IN	power_in	Input supply to the buck regulator (4.5V to 36V). One of three parallel IN pins; connect all IN pins together and place high-quality bypass capacitors directly to PGND.
4	EN/UVLO	input	Precision enable input. High = on, Low = off; do not float. Can be tied to VIN or set with an external resistor divider to program a custom UVLO (rising threshold ≈1.20V, ~90mV hysteresis).
5	CTRL1	input	Logic-level configuration input; used together with CTRL2 to select device/system operating modes (see datasheet Table 10-10). Referenced to AGND; absolute max 6V.
6	CTRL2	input	Logic-level configuration input; used together with CTRL1 to select device/system operating modes (see datasheet Table 10-10). Referenced to AGND; absolute max 6V.
7	THERM_WARN	output	Active-LOW open-drain thermal warning flag. Asserted when the voltage on the NTC pin rises above the thermal-warning threshold. TPS25833-Q1 only.
8	NTC	input	NTC-resistor divider input used to monitor external PCB temperature for user-programmable thermal overload protection. Absolute max 6V; input range 0 to VCC. TPS25833-Q1 only.
9	RT/SYNC	input	Frequency-setting resistor to AGND (300kHz-2.2MHz) or external clock synchronization input. When pulled above the PLL upper threshold the pin becomes a high-impedance clock input to the internal PLL; if edges stop, the internal amplifier re-engages and RT programming resumes.
10	LS_GD	output	External NMOS gate-driver output used to trim current-limit / provide an external pass FET between CSN/OUT and BUS. For TPS25832-Q1 average-current-limit mode this pin must be pulled up through a 2.2kΩ resistor; behavior is analogous on TPS25833-Q1. Absolute max 18V.
11	IMON	passive	External resistor to AGND sets the maximum cable-compensation voltage at full load current. Typical RIMON = 13kΩ; recommended 0 to 100kΩ.
12	ILIMIT	passive	External resistor to AGND programs the buck-regulator current-limit threshold (see Table 10-2). Typical RILIMIT = 13kΩ; recommended 0 to 100kΩ.
13	CSN/OUT	input	Negative input of the current-sense amplifier and buck-regulator feedback/output node used for internal voltage regulation (nominal 5.1V ±1%). Connect through RSNS (≈15mΩ) to CSP.
14	CSP	input	Positive input of the current-sense amplifier. Kelvin-connect across sense resistor RSNS to CSN/OUT; continuous input current is limited to 200µA.
15	BUS	input	VBUS discharge / sense input. Connect to the VBUS line of the USB Type-C connector; absolute max 18V.
16	AGND	power_in	Analog ground reference for internal references and logic; all electrical parameters are measured with respect to this pin. Connect to system ground on PCB (AGND-to-PGND max ±0.3V).
17	DM_IN	bidirectional	USB D- data line on the connector side. Includes VBUS short-to-VBAT protection and ±8kV contact / ±15kV air ESD protection per IEC 61000-4-2; used in BC1.2 handshake / DCP auto-mode on TPS25833-Q1.
18	DP_IN	bidirectional	USB D+ data line on the connector side. Includes VBUS short-to-VBAT protection and ±8kV contact / ±15kV air ESD protection per IEC 61000-4-2; used in BC1.2 handshake / DCP auto-mode on TPS25833-Q1.
19	CC2	bidirectional	Type-C Configuration Channel 2 analog I/O. Provides CC logic, 3A/1.5A current advertisement, VCONN sourcing (up to 250mA), and cable-orientation detect; ±8kV contact / ±15kV air ESD protected.
20	CC1	bidirectional	Type-C Configuration Channel 1 analog I/O. Provides CC logic, 3A/1.5A current advertisement, VCONN sourcing (up to 250mA), and cable-orientation detect; ±8kV contact / ±15kV air ESD protected.
21	VCC	power_out	Output of the internal 5V LDO used as supply to internal control circuits (4.75V-5.25V for 6V ≤ VIN ≤ 36V). Bypass with a 2.2µF ceramic capacitor to GND; max external source current 5mA.
22	POL	output	Active-LOW open-drain cable-polarity output. Asserted when CC2 is the CC line in the cable, giving the orientation needed to mux SuperSpeed lines. Pull-up to VCC; sink capability 10mA.
23	LD_DET	output	Active-LOW open-drain load-detect output. Asserted when a Type-C UFP (attached sink) is identified on the CC lines. Pull-up to VCC; sink capability 10mA.
24	FAULT	output	Active-LOW open-drain fault flag. Asserted during any of the fault conditions listed in Table 10-4 (over-current, OV, thermal shutdown, CC/Dx short, etc.). Pull-up to VCC; sink capability 10mA.
25	PGND	power_in	Power ground terminal for the buck regulator. One of three parallel PGND pins; connect to system ground and to AGND, and to the input-bypass capacitor with short, wide traces.
26	PGND	power_in	Power ground terminal for the buck regulator. One of three parallel PGND pins; connect to system ground and to AGND, and to the input-bypass capacitor with short, wide traces.
27	PGND	power_in	Power ground terminal for the buck regulator. One of three parallel PGND pins; connect to system ground and to AGND, and to the input-bypass capacitor with short, wide traces.
28	SW	power_out	Switching node of the buck regulator; internally tied to the source of the HS FET and drain of the LS FET. One of four parallel SW pins - connect them together to the external power inductor.
29	SW	power_out	Switching node of the buck regulator; internally tied to the source of the HS FET and drain of the LS FET. One of four parallel SW pins - connect them together to the external power inductor.
30	SW	power_out	Switching node of the buck regulator; internally tied to the source of the HS FET and drain of the LS FET. One of four parallel SW pins - connect them together to the external power inductor.
31	SW	power_out	Switching node of the buck regulator; internally tied to the source of the HS FET and drain of the LS FET. One of four parallel SW pins - connect them together to the external power inductor.
32	BOOT	passive	High-side FET gate-driver bootstrap capacitor connection. Connect a high-quality 100nF capacitor from BOOT to SW; boot UVLO threshold ≈ 2.2V.
33	EP	power_in	Exposed thermal pad on the bottom of the VQFN-32 (RHB) package. Must be soldered to the PCB PGND plane for proper thermal performance; corner anchors A1-A4 are electrically tied to this pad.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-32(5x5)
Category	Interface
Pins	33

Ordering variants

Same part, different packaging or reel option.

TPS25833QWRHBRQ1
TPS25833QWRHBTQ1
TPS25833QCWRHBRQ1

CAD (KiCad official)

Symbol: TPS25833QWRHBRQ1
Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
3D model: VQFN-32(5x5) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (None pp, sha256 e6928187076221a2, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF