LMR16030SDDAR from Texas Instruments, in a SO-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	BOOT	passive	Bootstrap capacitor connection for the high-side MOSFET gate driver. Connect a high-quality 0.1 µF capacitor from BOOT to SW. BOOT-to-SW rating is 6.5 V max; BOOT-to-GND up to 71 V absolute max.
2	VIN	power_in	Power supply input, 4.3 V to 60 V. Connect bypass capacitor CIN with the shortest possible path to GND for high-frequency decoupling.
3	EN	input	Enable input with internal pull-up current source. Pull below 1.20 V (typ threshold) to disable; float or tie to VIN to enable. May be used with a two-resistor divider to program an input under-voltage lockout. Rated up to 60 V.
4	RT/SYNC	bidirectional	Resistor Timing / External Clock input. A resistor from this pin to GND programs the switching frequency (200 kHz to 2.5 MHz). Pulling the pin above the PLL upper threshold switches it into synchronization mode, accepting an external clock (250 kHz to 2.3 MHz) into the internal PLL; when the clock stops, the pin reverts to RT resistor programming.
5	FB	input	Feedback input to the internal error amplifier; connect to the resistor divider from VOUT to set the output voltage. Internal reference VFB = 0.750 V typ. Do not short this pin to ground during operation.
6	SS	passive	Soft-Start pin (this SDDAR / 'S' variant). Connect an external capacitor CSS from this pin to GND to program the soft-start ramp time; internal SS source current is ~3.0 µA. On the alternate LMR16030PDDAR variant this pin is instead PGOOD (open-drain power-good flag).
7	GND	power_in	System ground return. Must be tied to the exposed thermal pad and to the ground plane.
8	SW	power_out	Switch node output of the regulator; internally connected to the source of the high-side power MOSFET (155 mΩ). Connect to the external power inductor. Rated -3 V to 65 V absolute max.
9	PAD	power_in	Exposed PowerPAD (thermal pad) on the package underside - major heat-dissipation path of the die. Must be soldered to the PCB ground plane for thermal and electrical connection.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SO-8-EP
Category	PMIC
Pins	9

Ordering variants

Same part, different packaging or reel option.

LMR16030SDDAR
LMR16030SDDARPDDAR

CAD (KiCad official)

Symbol: LMR16030SDDAR
Footprint: Package_SO:TI_SO-PowerPAD-8
3D model: SO-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`lmr16030sddar.step`	123 KB	You want the bare part, or you mark your own boards.
`lmr16030sddar-etched.step`	2.8 MB	You want the part with `LMR16030SDDAR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 674 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (35 pp, sha256 673e4773df97a65f, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF