component
CD74HCU04PWR
Public Made by Adomby adom
Texas Instruments Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD74HCU04PWR
Texas Instruments · Inverters · TSSOP-14
CD74HCU04PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Inverter 1 input, valid from 0V to VCC. |
| 2 | 1Y | output | Inverter 1 output, inverted 1A, with DC drain current limited to ±25mA. |
| 3 | 2A | input | Inverter 2 input, valid from 0V to VCC. |
| 4 | 2Y | output | Inverter 2 output, inverted 2A, with DC drain current limited to ±25mA. |
| 5 | 3A | input | Inverter 3 input, valid from 0V to VCC. |
| 6 | 3Y | output | Inverter 3 output, inverted 3A, with DC drain current limited to ±25mA. |
| 7 | GND | power_in | Ground reference for the device; DC VCC or ground current is limited to ±50mA. |
| 8 | 4Y | output | Inverter 4 output, inverted 4A, with DC drain current limited to ±25mA. |
| 9 | 4A | input | Inverter 4 input, valid from 0V to VCC. |
| 10 | 5Y | output | Inverter 5 output, inverted 5A, with DC drain current limited to ±25mA. |
| 11 | 5A | input | Inverter 5 input, valid from 0V to VCC. |
| 12 | 6Y | output | Inverter 6 output, inverted 6A, with DC drain current limited to ±25mA. |
| 13 | 6A | input | Inverter 6 input, valid from 0V to VCC. |
| 14 | VCC | power_in | Positive supply, operating range 2V to 6V (absolute maximum -0.5V to +7V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 | 7 | V | Voltages referenced to ground | 3 | |
| DC Input Diode Current | IIK | -20 | 20 | mA | For VI < -0.5V or VI > VCC + 0.5V | 3 | |
| DC Output Diode Current | IOK | -20 | 20 | mA | For VO < -0.5V or VO > VCC + 0.5V | 3 | |
| DC Drain Current per Output | IO | -25 | 25 | mA | For VO > -0.5V or VO < VCC + 0.5V | 3 | |
| DC VCC or Ground Current | ICC | -50 | 50 | mA | 3 | ||
| Maximum Junction Temperature (Plastic Package) | TJ | 150 | °C | Plastic package | 3 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 3 | ||
| Maximum Lead Temperature | 300 | °C | Soldering 10s | 3 | |||
| Operating Temperature Range | TA | -55 | 125 | °C | 3 | ||
| Supply Voltage Range | VCC | 2 | 6 | V | 3 | ||
| DC Input or Output Voltage | VI, VO | 0 | V | 0V to VCC | 3 | ||
| Thermal Resistance Junction to Ambient | θJA | 113 | °C/W | PW (TSSOP) package, typical, JESD 51-7 | 3 | ||
| High Level Input Voltage | VIH | 1.7 | V | VCC = 2V, -55°C to 125°C | 3 | ||
| High Level Input Voltage | VIH | 3.6 | V | VCC = 4.5V, -55°C to 125°C | 3 | ||
| High Level Input Voltage | VIH | 4.8 | V | VCC = 6V, -55°C to 125°C | 3 | ||
| Low Level Input Voltage | VIL | 0.3 | V | VCC = 2V, -55°C to 125°C | 3 | ||
| Low Level Input Voltage | VIL | 0.8 | V | VCC = 4.5V, -55°C to 125°C | 3 | ||
| Low Level Input Voltage | VIL | 1.1 | V | VCC = 6V, -55°C to 125°C | 3 | ||
| High Level Output Voltage CMOS Loads | VOH | 1.8 | V | VI = VIH or VIL, IO = -0.02mA, VCC = 2V, -55°C to 125°C | 3 | ||
| High Level Output Voltage CMOS Loads | VOH | 4 | V | VI = VIH or VIL, IO = -0.02mA, VCC = 4.5V, -55°C to 125°C | 3 | ||
| High Level Output Voltage CMOS Loads | VOH | 5.5 | V | VI = VIH or VIL, IO = -0.02mA, VCC = 6V, -55°C to 125°C | 3 | ||
| High Level Output Voltage TTL Loads | VOH | 3.7 | V | VI = VCC or GND, IO = -4mA, VCC = 4.5V, -55°C to 125°C | 3 | ||
| High Level Output Voltage TTL Loads | VOH | 5.2 | V | VI = VCC or GND, IO = -5.2mA, VCC = 6V, -55°C to 125°C | 3 | ||
| Low Level Output Voltage CMOS Loads | VOL | 0.2 | V | VI = VIH or VIL, IO = 0.02mA, VCC = 2V, -55°C to 125°C | 3 | ||
| Low Level Output Voltage CMOS Loads | VOL | 0.5 | V | VI = VIH or VIL, IO = 0.02mA, VCC = 4.5V, -55°C to 125°C | 3 | ||
| Low Level Output Voltage TTL Loads | VOL | 0.4 | V | IO = 4mA, VCC = 4.5V, -55°C to 125°C | 3 | ||
| Input Leakage Current | II | -1 | 1 | µA | VI = VCC or GND, VCC = 6V, -55°C to 125°C | 3 | |
| Quiescent Device Current | ICC | 40 | µA | VI = VCC or GND, IO = 0, VCC = 6V, -55°C to 125°C | 3 | ||
| Propagation Delay, Input to Output Y | tPLH, tPHL | 105 | ns | CL = 50pF, VCC = 2V, -55°C to 125°C | 4 | ||
| Propagation Delay, Input to Output Y | tPLH, tPHL | 21 | ns | CL = 50pF, VCC = 4.5V, -55°C to 125°C | 4 | ||
| Propagation Delay, Input to Output Y | tPLH, tPHL | 5 | ns | CL = 15pF, VCC = 5V, 25°C | 4 | ||
| Propagation Delay, Input to Output Y | tPLH, tPHL | 18 | ns | CL = 50pF, VCC = 6V, -55°C to 125°C | 4 | ||
| Transition Times | tTLH, tTHL | 110 | ns | CL = 50pF, VCC = 2V, -55°C to 125°C | 4 | ||
| Transition Times | tTLH, tTHL | 22 | ns | VCC = 4.5V, -55°C to 125°C | 4 | ||
| Transition Times | tTLH, tTHL | 19 | ns | VCC = 6V, -55°C to 125°C | 4 | ||
| Power Dissipation Capacitance | CPD | 14 | pF | VCC = 5V, 25°C, per inverter | 4 |
CAD (KiCad official)
- Symbol:
CD74HCU04PWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
cd74hcu04pwr-etched.step/cd74hcu04pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hcu04pwr.step/cd74hcu04pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (18 pp, sha256
d6be952cb440cccd, retrieved 2026-10-24, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).