component
STM32L151ZDT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L151ZDT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)
STM32L151ZDT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V tolerant (FT) I/O with reset default PE2; alternate functions TIM3_ETR, LCD_SEG38, TRACECLK, FSMC_A23. |
| 2 | PE3 | bidirectional | 5 V tolerant (FT) I/O with reset default PE3; alternate functions TIM3_CH1, LCD_SEG39, TRACED0, FSMC_A19. |
| 3 | PE4 | bidirectional | 5 V tolerant (FT) I/O with reset default PE4; alternate functions TIM3_CH2, TRACED1, FSMC_A20. |
| 4 | PE5 | bidirectional | 5 V tolerant (FT) I/O with reset default PE5; alternate functions TIM9_CH1, TRACED2, FSMC_A21. |
| 5 | PE6-WKUP3 | bidirectional | 5 V tolerant (FT) I/O with reset default PE6; alternate functions TIM9_CH2, TRACED3; additional function WKUP3 (wakeup) and RTC_TAMP3. |
| 6 | VLCD | power_in | LCD power supply pin; the datasheet states it applies to STM32L152xD devices only and that on STM32L151xD devices it must be connected to VDD. |
| 7 | PC13-WKUP2 | bidirectional | 5 V tolerant (FT) I/O with reset default PC13; additional functions WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT. |
| 8 | PC14-OSC32_IN | bidirectional | Standard 3.3 V (TC) I/O with reset default PC14; becomes OSC32_IN only when the LSE oscillator is on (LSEON), otherwise usable as GPIO. |
| 9 | PC15-OSC32_OUT | bidirectional | Standard 3.3 V (TC) I/O with reset default PC15; becomes OSC32_OUT only when the LSE oscillator is on (LSEON), otherwise usable as GPIO. |
| 10 | PF0 | bidirectional | 5 V tolerant (FT) I/O with reset default PF0; alternate function FSMC_A0. |
| 11 | PF1 | bidirectional | 5 V tolerant (FT) I/O with reset default PF1; alternate function FSMC_A1. |
| 12 | PF2 | bidirectional | 5 V tolerant (FT) I/O with reset default PF2; alternate function FSMC_A2. |
| 13 | PF3 | bidirectional | 5 V tolerant (FT) I/O with reset default PF3; alternate function FSMC_A3. |
| 14 | PF4 | bidirectional | 5 V tolerant (FT) I/O with reset default PF4; alternate function FSMC_A4. |
| 15 | PF5 | bidirectional | 5 V tolerant (FT) I/O with reset default PF5; alternate function FSMC_A5. |
| 16 | VSS_5 | power_in | Ground pin VSS_5; all voltages are referenced to VSS. |
| 17 | VDD_5 | power_in | Digital supply pin VDD_5; device supply range is 1.65 V to 3.6 V. |
| 18 | PF6 | bidirectional | 5 V tolerant (FT) I/O with reset default PF6; alternate function TIM5_CH1/TIM5_ETR; additional function ADC_IN27. |
| 19 | PF7 | bidirectional | 5 V tolerant (FT) I/O with reset default PF7; alternate function TIM5_CH2; additional functions ADC_IN28, COMP1_INP. |
| 20 | PF8 | bidirectional | 5 V tolerant (FT) I/O with reset default PF8; alternate function TIM5_CH3; additional functions ADC_IN29, COMP1_INP. |
| 21 | PF9 | bidirectional | 5 V tolerant (FT) I/O with reset default PF9; alternate function TIM5_CH4; additional functions ADC_IN30, COMP1_INP. |
| 22 | PF10 | bidirectional | 5 V tolerant (FT) I/O with reset default PF10; additional functions ADC_IN31, COMP1_INP. |
| 23 | PH0-OSC_IN | bidirectional | Standard 3.3 V (TC) I/O with reset default PH0; becomes OSC_IN only when the HSE oscillator is on (HSEON), otherwise usable as GPIO. |
| 24 | PH1-OSC_OUT | bidirectional | Standard 3.3 V (TC) I/O with reset default PH1; becomes OSC_OUT only when the HSE oscillator is on (HSEON), otherwise usable as GPIO. |
| 25 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |
| 26 | PC0 | bidirectional | 5 V tolerant (FT) I/O with reset default PC0; alternate function LCD_SEG18; additional functions ADC_IN10, COMP1_INP. |
| 27 | PC1 | bidirectional | 5 V tolerant (FT) I/O with reset default PC1; alternate function LCD_SEG19; additional functions ADC_IN11, COMP1_INP, OPAMP3_VINP. |
| 28 | PC2 | bidirectional | 5 V tolerant (FT) I/O with reset default PC2; alternate function LCD_SEG20; additional functions ADC_IN12, COMP1_INP, OPAMP3_VINM. |
| 29 | PC3 | bidirectional | Standard 3.3 V (TC) I/O with reset default PC3; alternate function LCD_SEG21; additional functions ADC_IN13, COMP1_INP, OPAMP3_VOUT. |
| 30 | VSSA | power_in | Analog ground pin for the ADC, DAC and comparators. |
| 31 | VREF- | power_in | Negative ADC reference pin; VSSA or VREF- must be tied to ground. |
| 32 | VREF+ | power_in | Positive ADC reference pin; minimum 1.8 V and maximum VDDA, and it can be grounded if neither the ADC nor the DAC is used. |
| 33 | VDDA | power_in | Analog supply pin; the ADC characteristics specify VDDA from 1.8 V to 3.6 V. |
| 34 | PA0-WKUP1 | bidirectional | 5 V tolerant (FT) I/O with reset default PA0; alternate functions TIM2_CH1_ETR, TIM5_CH1, USART2_CTS; additional functions WKUP1, RTC_TAMP2, ADC_IN0, COMP1_INP. |
| 35 | PA1 | bidirectional | 5 V tolerant (FT) I/O with reset default PA1; alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS, LCD_SEG0; additional functions ADC_IN1, COMP1_INP, OPAMP1_VINP. |
| 36 | PA2 | bidirectional | 5 V tolerant (FT) I/O with reset default PA2; alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, LCD_SEG1; additional functions ADC_IN2, COMP1_INP, OPAMP1_VINM. |
| 37 | PA3 | bidirectional | Standard 3.3 V (TC) I/O with reset default PA3; alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_SEG2; additional functions ADC_IN3, COMP1_INP, OPAMP1_VOUT. |
| 38 | VSS_4 | power_in | Ground pin VSS_4; all voltages are referenced to VSS. |
| 39 | VDD_4 | power_in | Digital supply pin VDD_4; device supply range is 1.65 V to 3.6 V. |
| 40 | PA4 | bidirectional | Standard 3.3 V (TC) I/O with reset default PA4; alternate functions SPI1_NSS, SPI3_NSS, I2S3_WS, USART2_CK; additional functions ADC_IN4, DAC_OUT1, COMP1_INP. |
| 41 | PA5 | bidirectional | Standard 3.3 V (TC) I/O with reset default PA5; alternate functions TIM2_CH1_ETR, SPI1_SCK; additional functions ADC_IN5, DAC_OUT2, COMP1_INP. |
| 42 | PA6 | bidirectional | 5 V tolerant (FT) I/O with reset default PA6; alternate functions TIM3_CH1, TIM10_CH1, SPI1_MISO, LCD_SEG3; additional functions ADC_IN6, COMP1_INP, OPAMP2_VINP. |
| 43 | PA7 | bidirectional | 5 V tolerant (FT) I/O with reset default PA7; alternate functions TIM3_CH2, TIM11_CH1, SPI1_MOSI, LCD_SEG4; additional functions ADC_IN7, COMP1_INP, OPAMP2_VINM. |
| 44 | PC4 | bidirectional | 5 V tolerant (FT) I/O with reset default PC4; alternate function LCD_SEG22; additional functions ADC_IN14, COMP1_INP. |
| 45 | PC5 | bidirectional | 5 V tolerant (FT) I/O with reset default PC5; alternate function LCD_SEG23; additional functions ADC_IN15, COMP1_INP. |
| 46 | PB0 | bidirectional | Standard 3.3 V (TC) I/O with reset default PB0; alternate functions TIM3_CH3, LCD_SEG5; additional functions ADC_IN8, COMP1_INP, OPAMP2_VOUT, VREF_OUT. |
| 47 | PB1 | bidirectional | 5 V tolerant (FT) I/O with reset default PB1; alternate functions TIM3_CH4, LCD_SEG6; additional functions ADC_IN9, COMP1_INP, VREF_OUT. |
| 48 | PB2 | bidirectional | 5 V tolerant (FT) I/O with reset default PB2; alternate function BOOT1; additional function ADC_IN0b. |
| 49 | PF11 | bidirectional | 5 V tolerant (FT) I/O with reset default PF11; additional function ADC_IN1b. |
| 50 | PF12 | bidirectional | 5 V tolerant (FT) I/O with reset default PF12; alternate function FSMC_A6; additional function ADC_IN2b. |
| 51 | VSS_6 | power_in | Ground pin VSS_6; all voltages are referenced to VSS. |
| 52 | VDD_6 | power_in | Digital supply pin VDD_6; device supply range is 1.65 V to 3.6 V. |
| 53 | PF13 | bidirectional | 5 V tolerant (FT) I/O with reset default PF13; alternate function FSMC_A7; additional function ADC_IN3b. |
| 54 | PF14 | bidirectional | 5 V tolerant (FT) I/O with reset default PF14; alternate function FSMC_A8; additional function ADC_IN6b. |
| 55 | PF15 | bidirectional | 5 V tolerant (FT) I/O with reset default PF15; alternate function FSMC_A9; additional function ADC_IN7b. |
| 56 | PG0 | bidirectional | 5 V tolerant (FT) I/O with reset default PG0; alternate function FSMC_A10; additional function ADC_IN8b. |
| 57 | PG1 | bidirectional | 5 V tolerant (FT) I/O with reset default PG1; alternate function FSMC_A11; additional function ADC_IN9b. |
| 58 | PE7 | bidirectional | Standard 3.3 V (TC) I/O with reset default PE7; alternate function FSMC_D4; additional functions ADC_IN22, COMP1_INP. |
| 59 | PE8 | bidirectional | Standard 3.3 V (TC) I/O with reset default PE8; alternate function FSMC_D5; additional functions ADC_IN23, COMP1_INP. |
| 60 | PE9 | bidirectional | Standard 3.3 V (TC) I/O with reset default PE9; alternate functions TIM2_CH1_ETR, FSMC_D6; additional functions ADC_IN24, COMP1_INP. |
| 61 | VSS_7 | power_in | Ground pin VSS_7; all voltages are referenced to VSS. |
| 62 | VDD_7 | power_in | Digital supply pin VDD_7; device supply range is 1.65 V to 3.6 V. |
| 63 | PE10 | bidirectional | Standard 3.3 V (TC) I/O with reset default PE10; alternate functions TIM2_CH2, FSMC_D7; additional functions ADC_IN25, COMP1_INP. |
| 64 | PE11 | bidirectional | 5 V tolerant (FT) I/O with reset default PE11; alternate functions TIM2_CH3, FSMC_D8. |
| 65 | PE12 | bidirectional | 5 V tolerant (FT) I/O with reset default PE12; alternate functions TIM2_CH4, SPI1_NSS, FSMC_D9. |
| 66 | PE13 | bidirectional | 5 V tolerant (FT) I/O with reset default PE13; alternate functions SPI1_SCK, FSMC_D10. |
| 67 | PE14 | bidirectional | 5 V tolerant (FT) I/O with reset default PE14; alternate functions SPI1_MISO, FSMC_D11. |
| 68 | PE15 | bidirectional | 5 V tolerant (FT) I/O with reset default PE15; alternate functions SPI1_MOSI, FSMC_D12. |
| 69 | PB10 | bidirectional | 5 V tolerant (FT) I/O with reset default PB10; alternate functions TIM2_CH3, I2C2_SCL, USART3_TX, LCD_SEG10. |
| 70 | PB11 | bidirectional | 5 V tolerant (FT) I/O with reset default PB11; alternate functions TIM2_CH4, I2C2_SDA, USART3_RX, LCD_SEG11. |
| 71 | VSS_1 | power_in | Ground pin VSS_1; all voltages are referenced to VSS. |
| 72 | VDD_1 | power_in | Digital supply pin VDD_1; device supply range is 1.65 V to 3.6 V. |
| 73 | PB12 | bidirectional | 5 V tolerant (FT) I/O with reset default PB12; alternate functions TIM10_CH1, I2C2_SMBA, SPI2_NSS, I2S2_WS, USART3_CK, LCD_SEG12; additional functions ADC_IN18, COMP1_INP. |
| 74 | PB13 | bidirectional | 5 V tolerant (FT) I/O with reset default PB13; alternate functions TIM9_CH1, SPI2_SCK, I2S2_CK, USART3_CTS, LCD_SEG13; additional functions ADC_IN19, COMP1_INP. |
| 75 | PB14 | bidirectional | 5 V tolerant (FT) I/O with reset default PB14; alternate functions TIM9_CH2, SPI2_MISO, USART3_RTS, LCD_SEG14; additional functions ADC_IN20, COMP1_INP. |
| 76 | PB15 | bidirectional | 5 V tolerant (FT) I/O with reset default PB15; alternate functions TIM11_CH1, SPI2_MOSI, I2S2_SD, LCD_SEG15; additional functions ADC_IN21, COMP1_INP, RTC_REFIN. |
| 77 | PD8 | bidirectional | 5 V tolerant (FT) I/O with reset default PD8; alternate functions USART3_TX, LCD_SEG28, FSMC_D13. |
| 78 | PD9 | bidirectional | 5 V tolerant (FT) I/O with reset default PD9; alternate functions USART3_RX, LCD_SEG29, FSMC_D14. |
| 79 | PD10 | bidirectional | 5 V tolerant (FT) I/O with reset default PD10; alternate functions USART3_CK, LCD_SEG30, FSMC_D15. |
| 80 | PD11 | bidirectional | 5 V tolerant (FT) I/O with reset default PD11; alternate functions USART3_CTS, LCD_SEG31, FSMC_A16. |
| 81 | PD12 | bidirectional | 5 V tolerant (FT) I/O with reset default PD12; alternate functions TIM4_CH1, USART3_RTS, LCD_SEG32, FSMC_A17. |
| 82 | PD13 | bidirectional | 5 V tolerant (FT) I/O with reset default PD13; alternate functions TIM4_CH2, LCD_SEG33, FSMC_A18. |
| 83 | VSS_8 | power_in | Ground pin VSS_8; all voltages are referenced to VSS. |
| 84 | VDD_8 | power_in | Digital supply pin VDD_8; device supply range is 1.65 V to 3.6 V. |
| 85 | PD14 | bidirectional | 5 V tolerant (FT) I/O with reset default PD14; alternate functions TIM4_CH3, LCD_SEG34, FSMC_D0. |
| 86 | PD15 | bidirectional | 5 V tolerant (FT) I/O with reset default PD15; alternate functions TIM4_CH4, LCD_SEG35, FSMC_D1. |
| 87 | PG2 | bidirectional | 5 V tolerant (FT) I/O with reset default PG2; alternate function FSMC_A12; additional function ADC_IN10b. |
| 88 | PG3 | bidirectional | 5 V tolerant (FT) I/O with reset default PG3; alternate function FSMC_A13; additional function ADC_IN11b. |
| 89 | PG4 | bidirectional | 5 V tolerant (FT) I/O with reset default PG4; alternate function FSMC_A14; additional function ADC_IN12b. |
| 90 | PG5 | bidirectional | 5 V tolerant (FT) I/O with reset default PG5; alternate function FSMC_A15. |
| 91 | PG6 | bidirectional | 5 V tolerant (FT) I/O with reset default PG6; no alternate function listed in Table 8. |
| 92 | PG7 | bidirectional | 5 V tolerant (FT) I/O with reset default PG7; no alternate function listed in Table 8. |
| 93 | PG8 | bidirectional | 5 V tolerant (FT) I/O with reset default PG8; no alternate function listed in Table 8. |
| 94 | VSS_9 | power_in | Ground pin VSS_9; all voltages are referenced to VSS. |
| 95 | VDD_9 | power_in | Digital supply pin VDD_9; device supply range is 1.65 V to 3.6 V. |
| 96 | PC6 | bidirectional | 5 V tolerant (FT) I/O with reset default PC6; alternate functions TIM3_CH1, I2S2_MCK, LCD_SEG24, SDIO_D6. |
| 97 | PC7 | bidirectional | 5 V tolerant (FT) I/O with reset default PC7; alternate functions TIM3_CH2, I2S3_MCK, LCD_SEG25, SDIO_D7. |
| 98 | PC8 | bidirectional | 5 V tolerant (FT) I/O with reset default PC8; alternate functions TIM3_CH3, LCD_SEG26, SDIO_D0. |
| 99 | PC9 | bidirectional | 5 V tolerant (FT) I/O with reset default PC9; alternate functions TIM3_CH4, LCD_SEG27, SDIO_D1. |
| 100 | PA8 | bidirectional | 5 V tolerant (FT) I/O with reset default PA8; alternate functions USART1_CK, MCO, LCD_COM0. |
| 101 | PA9 | bidirectional | 5 V tolerant (FT) I/O with reset default PA9; alternate functions USART1_TX, LCD_COM1. |
| 102 | PA10 | bidirectional | 5 V tolerant (FT) I/O with reset default PA10; alternate functions USART1_RX, LCD_COM2. |
| 103 | PA11 | bidirectional | 5 V tolerant (FT) I/O with reset default PA11; alternate functions USART1_CTS, SPI1_MISO; additional function USB_DM. |
| 104 | PA12 | bidirectional | 5 V tolerant (FT) I/O with reset default PA12; alternate functions USART1_RTS, SPI1_MOSI; additional function USB_DP. |
| 105 | PA13 | bidirectional | 5 V tolerant (FT) I/O with reset default JTMS-SWDIO; serial wire debug data pin shared with JTMS. |
| 106 | PH2 | bidirectional | 5 V tolerant (FT) I/O with reset default PH2; alternate function FSMC_A22. |
| 107 | VSS_2 | power_in | Ground pin VSS_2; all voltages are referenced to VSS. |
| 108 | VDD_2 | power_in | Digital supply pin VDD_2; device supply range is 1.65 V to 3.6 V. |
| 109 | PA14 | bidirectional | 5 V tolerant (FT) I/O with reset default JTCK-SWCLK; serial wire debug clock pin. |
| 110 | PA15 | bidirectional | 5 V tolerant (FT) I/O with reset default JTDI; alternate functions TIM2_CH1_ETR, SPI1_NSS, SPI3_NSS, I2S3_WS, LCD_SEG17. |
| 111 | PC10 | bidirectional | 5 V tolerant (FT) I/O with reset default PC10; alternate functions SPI3_SCK, I2S3_CK, USART3_TX, UART4_TX, LCD_SEG28, LCD_SEG40, LCD_COM4, SDIO_D2. |
| 112 | PC11 | bidirectional | 5 V tolerant (FT) I/O with reset default PC11; alternate functions SPI3_MISO, USART3_RX, UART4_RX, LCD_SEG29, LCD_SEG41, LCD_COM5, SDIO_D3. |
| 113 | PC12 | bidirectional | 5 V tolerant (FT) I/O with reset default PC12; alternate functions SPI3_MOSI, I2S3_SD, USART3_CK, UART5_TX, LCD_SEG30, LCD_SEG42, LCD_COM6, SDIO_CK. |
| 114 | PD0 | bidirectional | 5 V tolerant (FT) I/O with reset default PD0; alternate functions TIM9_CH1, SPI2_NSS, I2S2_WS, FSMC_D2. |
| 115 | PD1 | bidirectional | 5 V tolerant (FT) I/O with reset default PD1; alternate functions SPI2_SCK, I2S2_CK, FSMC_D3. |
| 116 | PD2 | bidirectional | 5 V tolerant (FT) I/O with reset default PD2; alternate functions TIM3_ETR, UART5_RX, LCD_SEG31, LCD_SEG43, LCD_COM7, SDIO_CMD. |
| 117 | PD3 | bidirectional | 5 V tolerant (FT) I/O with reset default PD3; alternate functions SPI2_MISO, USART2_CTS, FSMC_CLK. |
| 118 | PD4 | bidirectional | 5 V tolerant (FT) I/O with reset default PD4; alternate functions SPI2_MOSI, I2S2_SD, USART2_RTS, FSMC_NOE. |
| 119 | PD5 | bidirectional | 5 V tolerant (FT) I/O with reset default PD5; alternate functions USART2_TX, FSMC_NWE. |
| 120 | VSS_10 | power_in | Ground pin VSS_10; all voltages are referenced to VSS. |
| 121 | VDD_10 | power_in | Digital supply pin VDD_10; device supply range is 1.65 V to 3.6 V. |
| 122 | PD6 | bidirectional | 5 V tolerant (FT) I/O with reset default PD6; alternate functions USART2_RX, FSMC_NWAIT. |
| 123 | PD7 | bidirectional | 5 V tolerant (FT) I/O with reset default PD7; alternate functions TIM9_CH2, USART2_CK, FSMC_NE1. |
| 124 | PG9 | bidirectional | 5 V tolerant (FT) I/O with reset default PG9; alternate function FSMC_NE2. |
| 125 | PG10 | bidirectional | 5 V tolerant (FT) I/O with reset default PG10; alternate function FSMC_NE3. |
| 126 | PG11 | bidirectional | 5 V tolerant (FT) I/O with reset default PG11; no alternate function listed in Table 8. |
| 127 | PG12 | bidirectional | 5 V tolerant (FT) I/O with reset default PG12; alternate function FSMC_NE4. |
| 128 | PG13 | bidirectional | 5 V tolerant (FT) I/O with reset default PG13; alternate function FSMC_A24. |
| 129 | PG14 | bidirectional | 5 V tolerant (FT) I/O with reset default PG14; alternate function FSMC_A25. |
| 130 | VSS_11 | power_in | Ground pin VSS_11; all voltages are referenced to VSS. |
| 131 | VDD_11 | power_in | Digital supply pin VDD_11; device supply range is 1.65 V to 3.6 V. |
| 132 | PG15 | bidirectional | 5 V tolerant (FT) I/O with reset default PG15; no alternate function listed in Table 8. |
| 133 | PB3 | bidirectional | 5 V tolerant (FT) I/O with reset default JTDO; alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK, I2S3_CK, LCD_SEG7; additional function COMP2_INM. |
| 134 | PB4 | bidirectional | 5 V tolerant (FT) I/O with reset default NJTRST; alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO, LCD_SEG8; additional function COMP2_INP. |
| 135 | PB5 | bidirectional | 5 V tolerant (FT) I/O with reset default PB5; alternate functions TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, I2S3_SD, LCD_SEG9; additional function COMP2_INP. |
| 136 | PB6 | bidirectional | 5 V tolerant (FT) I/O with reset default PB6; alternate functions TIM4_CH1, I2C1_SCL, USART1_TX; additional function COMP2_INP. |
| 137 | PB7 | bidirectional | 5 V tolerant (FT) I/O with reset default PB7; alternate functions TIM4_CH2, I2C1_SDA, USART1_RX, FSMC_NADV; additional functions COMP2_INP, PVD_IN. |
| 138 | BOOT0 | input | Dedicated BOOT0 pin (type B in the pin table) used for boot mode selection. |
| 139 | PB8 | bidirectional | 5 V tolerant (FT) I/O with reset default PB8; alternate functions TIM4_CH3, TIM10_CH1, I2C1_SCL, LCD_SEG16, SDIO_D4. |
| 140 | PB9 | bidirectional | 5 V tolerant (FT) I/O with reset default PB9; alternate functions TIM4_CH4, TIM11_CH1, I2C1_SDA, LCD_COM3, SDIO_D5. |
| 141 | PE0 | bidirectional | 5 V tolerant (FT) I/O with reset default PE0; alternate functions TIM4_ETR, TIM10_CH1, LCD_SEG36, FSMC_NBL0. |
| 142 | PE1 | bidirectional | 5 V tolerant (FT) I/O with reset default PE1; alternate functions TIM11_CH1, LCD_SEG37, FSMC_NBL1. |
| 143 | VSS_3 | power_in | Ground pin VSS_3; all voltages are referenced to VSS. |
| 144 | VDD_3 | power_in | Digital supply pin VDD_3; device supply range is 1.65 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-144(20x20) |
| Category | Embedded Processors & Controllers |
| Pins | 144 |
CAD (KiCad official)
- Symbol:
STM32L151ZDT6 - Footprint:
Package_QFP:LQFP-144_20x20mm_P0.5mm - 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
- 3D model files:
stm32l151zdt6-etched.step/stm32l151zdt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l151zdt6.step/stm32l151zdt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (155 pp, sha256
92c7b8f244edf6a6, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).