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DAC8820IBDBR

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Texas Instruments Digital To Analog Converters (DAC), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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DAC8820IBDBR

Texas Instruments · Digital To Analog Converters (DAC) · SSOP-28

DAC8820IBDBR from Texas Instruments, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Reference input and 4-quadrant resistor (R2); the external VREF range is -15 V to +15 V and it sets the DAC full-scale output current.
2 RCOM passive Center tap of the two 4-quadrant resistors R1 and R2.
3 R1 passive 4-quadrant resistor R1; bipolar R1/R2 resistance is 9 kΩ min, 12 kΩ typ, 15 kΩ max.
4 ROFS passive Bipolar offset resistor; ROFS and RFB feedback/offset resistance is 9 kΩ min, 12 kΩ typ, 15 kΩ max.
5 RFB passive Internal matching feedback resistor that provides temperature tracking when used with an external I/V op amp; 9 kΩ min, 12 kΩ typ, 15 kΩ max.
6 IOUT output DAC current output, which must be held at virtual GND by the external I/V op amp; full-scale output current is 1.66 mA with VREF = 10 V.
7 AGND power_in Analog ground for the DAC, separate from digital ground DGND.
8 LDAC input Digital input load DAC control; when high, data is loaded from the input register into the DAC register, updating the DAC output.
9 WR input Active-low write control; when taken low, the 16 data bits on D0-D15 are loaded into the 16-bit input register.
10 D15 input Digital input data bit D15, the MSB; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
11 D14 input Digital input data bit D14; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
12 D13 input Digital input data bit D13; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
13 D12 input Digital input data bit D12; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
14 D11 input Digital input data bit D11; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
15 D10 input Digital input data bit D10; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
16 D9 input Digital input data bit D9; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
17 D8 input Digital input data bit D8; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
18 D7 input Digital input data bit D7; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
19 D6 input Digital input data bit D6; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
20 D5 input Digital input data bit D5; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
21 D4 input Digital input data bit D4; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
22 DGND power_in Digital ground reference for the logic inputs.
23 VDD power_in Positive power supply, specified from 2.7 V to 5.5 V.
24 D3 input Digital input data bit D3; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
25 D2 input Digital input data bit D2; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
26 D1 input Digital input data bit D1; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
27 D0 input Digital input data bit D0, the LSB; logic input with VIL max 0.8 V and VIH min 2.4 V at VDD = +5 V (0.6 V / 2.1 V at VDD = +2.7 V).
28 RST input Active-low reset; when taken low, the DAC register is set to zero code and the DAC output goes to 0 V, while the input register contents are not reset.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-28
Category Data Acquisition
Pins 28

CAD (KiCad official)

  • Symbol: DAC8820IBDBR
  • Footprint: Package_SO:SSOP-28_5.3x10.2mm_P0.65mm
  • 3D model: SSOP-28 (KiCad packages3D, STEP)
  • 3D model files: dac8820ibdbr-etched.step / dac8820ibdbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dac8820ibdbr.step / dac8820ibdbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 79b7ff3a642a94eb, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF