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ADC3641IRSBR

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Texas Instruments Analog To Digital Converters (ADC), VQFN-40(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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ADC3641IRSBR

Texas Instruments · Analog To Digital Converters (ADC) · VQFN-40(5x5)

ADC3641IRSBR from Texas Instruments, in a VQFN-40(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PDN/SYNC input Power down/synchronization input, active high, configurable via SPI, with an internal 21 kΩ pull-down resistor.
2 VREF power_in External voltage reference input.
3 REFGND input Reference ground input, 0 V.
4 REFBUF input 1.2 V external voltage reference input for use with the internal reference buffer, with an internal 100 kΩ pull-up to AVDD; this pin also configures default operating conditions.
5 AVDD power_in Analog 1.8 V power supply (recommended 1.75 V to 1.85 V, measured to GND).
6 CLKP input Positive differential sampling clock input for the ADC.
7 CLKM input Negative differential sampling clock input for the ADC.
8 VCM output Common-mode voltage output for the analog inputs, 0.95 V, which must be provided externally on each input pin for DC-coupled inputs.
9 RESET input Hardware reset, active high, with an internal 21 kΩ pull-down resistor.
10 SDIO bidirectional Serial interface data input and output, with an internal 21 kΩ pull-down resistor.
11 GND power_in Ground, 0 V.
12 AINP input Positive analog input, channel A (intended to be driven differentially with a 0.95 V input common-mode voltage).
13 AINM input Negative analog input, channel A (intended to be driven differentially with a 0.95 V input common-mode voltage).
14 GND power_in Ground, 0 V.
15 AVDD power_in Analog 1.8 V power supply (recommended 1.75 V to 1.85 V, measured to GND).
16 SEN input Serial interface enable, active low, with an internal 21 kΩ pull-up resistor to AVDD.
17 DA0 output CMOS digital data output.
18 DA1 bidirectional CMOS digital data output; used as FCLK frame clock output for serialized CMOS output modes, configured using SPI.
19 DA2 output CMOS digital data output.
20 DA3 output CMOS digital data output.
21 IOVDD power_in 1.8 V power supply for the digital interface (recommended 1.75 V to 1.85 V, measured to GND).
22 DA4 output CMOS digital data output.
23 DA5 output CMOS digital data output.
24 DA6 output CMOS digital data output.
25 DCLK output CMOS output for the data bit clock.
26 IOGND power_in Ground, 0 V, for the digital interface.
27 DB6 output CMOS digital data output.
28 DB5 output CMOS digital data output.
29 DB4 output CMOS digital data output.
30 IOVDD power_in 1.8 V power supply for the digital interface (recommended 1.75 V to 1.85 V, measured to GND).
31 DB3 output CMOS digital data output.
32 DB2 output CMOS digital data output.
33 DB1 bidirectional CMOS digital data output; used as DCLKIN bit clock input for serialized CMOS output modes, configured using SPI; absolute maximum voltage on this pin is MIN(2.1, IOVDD+0.3) V.
34 DB0 output CMOS digital data output.
35 SCLK input Serial interface clock input, with an internal 21 kΩ pull-down resistor.
36 AVDD power_in Analog 1.8 V power supply (recommended 1.75 V to 1.85 V, measured to GND).
37 GND power_in Ground, 0 V.
38 BINM input Negative analog input, channel B (intended to be driven differentially with a 0.95 V input common-mode voltage).
39 BINP input Positive analog input, channel B (intended to be driven differentially with a 0.95 V input common-mode voltage).
40 GND power_in Ground, 0 V.
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-40(5x5)
Category Data Acquisition
Pins 41

CAD (KiCad official)

  • Symbol: ADC3641IRSBR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm
  • 3D model: VQFN-40(5x5) (KiCad packages3D, STEP)
  • 3D model files: adc3641irsbr-etched.step / adc3641irsbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adc3641irsbr.step / adc3641irsbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (87 pp, sha256 713e54efbc9dff1e, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF