component
SN74AHCT14N
Public Made by Adomby adom
Texas Instruments Inverters, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSN74AHCT14N
Texas Instruments · Inverters · PDIP-14
SN74AHCT14N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Schmitt-trigger inverter 1 input, TTL-compatible, accepts up to 5.5 V; tie to VCC or GND if unused. |
| 2 | 1Y | output | Inverter 1 output, drives up to ±8 mA (recommended) and ±25 mA absolute maximum. |
| 3 | 2A | input | Schmitt-trigger inverter 2 input, TTL-compatible, accepts up to 5.5 V; tie to VCC or GND if unused. |
| 4 | 2Y | output | Inverter 2 output, drives up to ±8 mA (recommended) and ±25 mA absolute maximum. |
| 5 | 3A | input | Schmitt-trigger inverter 3 input, TTL-compatible, accepts up to 5.5 V; tie to VCC or GND if unused. |
| 6 | 3Y | output | Inverter 3 output, drives up to ±8 mA (recommended) and ±25 mA absolute maximum. |
| 7 | GND | power_in | Ground pin. |
| 8 | 4Y | output | Inverter 4 output, drives up to ±8 mA (recommended) and ±25 mA absolute maximum. |
| 9 | 4A | input | Schmitt-trigger inverter 4 input, TTL-compatible, accepts up to 5.5 V; tie to VCC or GND if unused. |
| 10 | 5Y | output | Inverter 5 output, drives up to ±8 mA (recommended) and ±25 mA absolute maximum. |
| 11 | 5A | input | Schmitt-trigger inverter 5 input, TTL-compatible, accepts up to 5.5 V; tie to VCC or GND if unused. |
| 12 | 6Y | output | Inverter 6 output, drives up to ±8 mA (recommended) and ±25 mA absolute maximum. |
| 13 | 6A | input | Schmitt-trigger inverter 6 input, TTL-compatible, accepts up to 5.5 V; tie to VCC or GND if unused. |
| 14 | VCC | power_in | Power supply pin, recommended 4.5 V to 5.5 V (absolute maximum 7 V), with a 0.1 µF bypass capacitor placed close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage range | VI | -0.5 | 7 | V | 4 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 4 | ||
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 4 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 4 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | 0 | 2000 | V | Human body model, all pins | 4 | |
| ESD CDM | V(ESD) | 0 | 1000 | V | Charged device model, all pins | 4 | |
| Supply voltage | VCC | 4.5 | 5.5 | V | 4 | ||
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage | VO | 0 | V | max is VCC | 4 | ||
| High-level output current | IOH | -8 | mA | 4 | |||
| Low-level output current | IOL | 8 | mA | 4 | |||
| Operating free-air temperature | TA | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 61.1 | °C/W | N package, 14 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 48 | °C/W | N package | 5 | ||
| Junction-to-board thermal resistance | RθJB | 41 | °C/W | N package | 5 | ||
| Junction-to-top characterization parameter | ψJT | 32.4 | °C/W | N package | 5 | ||
| Junction-to-board characterization parameter | ψJB | 40.9 | °C/W | N package | 5 | ||
| Positive-going input threshold voltage | VT+ | 0.9 | 1.9 | V | VCC = 4.5 V | 5 | |
| Positive-going input threshold voltage | VT+ | 1 | 2.1 | V | VCC = 5.5 V | 5 | |
| Negative-going input threshold voltage | VT- | 0.5 | 1.5 | V | VCC = 4.5 V | 5 | |
| Negative-going input threshold voltage | VT- | 0.6 | 1.7 | V | VCC = 5.5 V | 5 | |
| Hysteresis (VT+, VT-) | ΔVT | 0.4 | 1.4 | V | VCC = 4.5 V | 5 | |
| Hysteresis (VT+, VT-) | ΔVT | 0.4 | 1.5 | V | VCC = 5.5 V | 5 | |
| High-level output voltage | VOH | 4.4 | V | IOH = -50 µA, VCC = 4.5 V | 5 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -8 mA, VCC = 4.5 V | 5 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 µA, VCC = 4.5 V | 5 | ||
| Low-level output voltage | VOL | 0.44 | V | IOL = 8 mA, VCC = 4.5 V | 5 | ||
| Input leakage current | II | -1 | 1 | µA | VI = 5.5 V or GND, VCC = 0 V to 5.5 V | 5 | |
| Supply current | ICC | 20 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V | 5 | ||
| Additional supply current per input | ΔICC | 1.5 | mA | One input at 3.4 V, other inputs at VCC or GND, VCC = 5.5 V | 5 | ||
| Input capacitance | Ci | 10 | pF | VI = VCC or GND, VCC = 5 V | 5 | ||
| Propagation delay A to Y | tPLH/tPHL | 1 | 8 | ns | CL = 15 pF | 6 | |
| Propagation delay A to Y | tPLH/tPHL | 1 | 9 | ns | CL = 50 pF | 6 | |
| Power dissipation capacitance | Cpd | 12 | pF | No load, f = 1 MHz, VCC = 5 V, TA = 25°C | 6 |
CAD (KiCad official)
- Symbol:
SN74AHCT14N - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ahct14n-etched.step/sn74ahct14n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahct14n.step/sn74ahct14n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (35 pp, sha256
a16642fc10814c9a, retrieved 2026-10-24, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).