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Contents

README

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Hi7020S

Hichips(智芯) · IC · SOP-8

Hi7020S from Hichips(智芯), in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Supply input for the chip; the chip starts when VIN exceeds 4.7 V, the absolute maximum rating is -0.3 to 80 V, and the datasheet recommends a minimum operating VIN above 6.5 V for better stability.
2 CS input Current-sense input connected to the sense resistor for average-current regulation against the internal 251 mV reference, with an absolute maximum rating of -0.3 to 7.0 V.
3 GND power_in Chip ground reference pin.
4 GATE output Gate drive output for the external NMOS switch; the datasheet gives no gate voltage limit for this pin.
5 PWM input PWM dimming input where high enables output and low disables it, with absolute maximum rating of -0.3 to 7.0 V, rising threshold 1.4 V, falling threshold 0.8 V, and pulses down to 60 ns recognized; it defaults to high when left floating.
6 NC unconnected Listed as NC (no connection) in the datasheet pin table, with no function given.
7 NC unconnected Listed as NC (no connection) in the datasheet pin table, with no function given.
8 NC unconnected Listed as NC (no connection) in the datasheet pin table, with no function given.

Key specifications

Parameter Value
Manufacturer Hichips(智芯)
Package SOP-8
Category
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
芯片供电输入 (VIN) VIN -0.3 80 V 2
CS 输入电压 VCS -0.3 7 V 2
PWM 输入电压 VPWM -0.3 7 V 2
工作温度 TA -40 125 ℃ 2
存储温度 TSTG -40 150 ℃ 2
人体放电模式 ESD (HBM) HBM 2 KV 人体放电模式; table prints '>2' 2
系统最大工作频率 OSC_MAX 1000 KHz 3
系统最小工作频率 OSC_MIN 30 KHz 3
恒流精度 -3 3 % 输出电流恒流精度 (printed ≤±3%) 1
PWM 调光最小响应脉宽 60 ns 可响应最小 60ns 脉宽 1
建议 VIN 最小工作电压 VIN 6.5 V 建议 (application note 9.2), 6.5V 以上 4

CAD (KiCad official)

  • Symbol: Hi7020S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: hi7020s-etched.step / hi7020s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hi7020s.step / hi7020s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Hichips(智芯) datasheet (9 pp, sha256 de02eca2003ec847, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF