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PCM1793DBR

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Texas Instruments ADCs/DACs - Special Purpose, SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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PCM1793DBR

Texas Instruments · ADCs/DACs - Special Purpose · SSOP-28

PCM1793DBR from Texas Instruments, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LRCK input Left and right clock (fS) input for the audio interface, Schmitt-trigger and 5-V tolerant; it must be synchronized with the system clock, and sampling frequency is 10 kHz to 200 kHz.
2 BCK input Serial audio bit clock input, Schmitt-trigger and 5-V tolerant; serial data on DATA is clocked in on its rising edge.
3 DATA input Serial audio data input, Schmitt-trigger and 5-V tolerant; data is binary 2s complement, MSB first.
4 MUTE input Analog output mute control, Schmitt-trigger and 5-V tolerant; when HIGH, both analog outputs move to the bipolar zero level in −0.5-dB steps at 1/fS per step.
5 SCK input System clock input, Schmitt-trigger and 5-V tolerant; the device auto-detects 128, 192, 256, 384, 512 or 768 fS, with a minimum pulse cycle time of 13 ns.
6 RST input External reset input, Schmitt-trigger and 5-V tolerant; a LOW pulse of at least 20 ns forces the device to its default state, followed by 1024 system clocks of initialization.
7 VDD power_in Digital power supply, 3.3 V nominal with a voltage range of 3 V to 3.6 V.
8 DGND power_in Digital ground for the digital section of the device.
9 AGNDF power_in Analog ground for the DACFF section.
10 VCCR power_in Analog power supply for the R-channel I/V stage, 5 V nominal with a voltage range of 4.5 V to 5.5 V.
11 AGNDR power_in Analog ground for the R-channel I/V stage.
12 VOUTR− output R-channel analog voltage output (negative leg); forms the differential output with VOUTR+, 3.2 V p-p at full scale (0 dB).
13 VOUTR+ output R-channel analog voltage output (positive leg); forms the differential output with VOUTR−, 3.2 V p-p at full scale (0 dB).
14 VCOM passive Internal bias decoupling pin, to be decoupled externally.
15 VCCC power_in Analog power supply for the internal bias and current DAC, 5 V nominal with a voltage range of 4.5 V to 5.5 V.
16 AGNDC power_in Analog ground for the internal bias and current DAC.
17 VOUTL+ output L-channel analog voltage output (positive leg); forms the differential output with VOUTL−, 3.2 V p-p at full scale (0 dB).
18 VOUTL− output L-channel analog voltage output (negative leg); forms the differential output with VOUTL+, 3.2 V p-p at full scale (0 dB).
19 AGNDL power_in Analog ground for the L-channel I/V stage.
20 VCCL power_in Analog power supply for the L-channel I/V stage, 5 V nominal with a voltage range of 4.5 V to 5.5 V.
21 VCCF power_in Analog power supply for the DACFF section, 5 V nominal with a voltage range of 4.5 V to 5.5 V.
22 ZEROR output Zero flag output for the R channel; goes HIGH when the R-channel input data is continuously zero for 1024 fS.
23 ZEROL output Zero flag output for the L channel; goes HIGH when the L-channel input data is continuously zero for 1024 fS.
24 DEMP0 input De-emphasis control bit 0, Schmitt-trigger and 5-V tolerant; together with DEMP1 selects de-emphasis off, 48 kHz, 44.1 kHz or 32 kHz.
25 DEMP1 input De-emphasis control bit 1, Schmitt-trigger and 5-V tolerant; together with DEMP0 selects de-emphasis off, 48 kHz, 44.1 kHz or 32 kHz.
26 FMT0 input Audio data format select bit 0, Schmitt-trigger and 5-V tolerant; together with FMT1 and FMT2 selects the standard, left-justified or I2S format and bit length.
27 FMT1 input Audio data format select bit 1, Schmitt-trigger and 5-V tolerant; together with FMT0 and FMT2 selects the standard, left-justified or I2S format and bit length.
28 FMT2 input Audio data format select bit 2, Schmitt-trigger and 5-V tolerant; together with FMT0 and FMT1 selects the standard, left-justified or I2S format and bit length.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-28
Category Data Acquisition
Pins 28

CAD (KiCad official)

  • Symbol: PCM1793DBR
  • Footprint: Package_SO:SSOP-28_5.3x10.2mm_P0.65mm
  • 3D model: SSOP-28 (KiCad packages3D, STEP)
  • 3D model files: pcm1793dbr-etched.step / pcm1793dbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pcm1793dbr.step / pcm1793dbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 a564e671a9b59486, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF