component
SN74HC74N
Public Made by Adomby adom
lingxingic Flip Flops, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HC74N
lingxingic · Flip Flops · DIP-14
SN74HC74N from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1RD | input | Asynchronous reset input for flip-flop 1, active low; when low with 1SD high, it forces 1Q low and 1Q̄ high. |
| 2 | 1D | input | Data input for flip-flop 1, sampled on the low-to-high transition of 1CP; the datasheet notes the input has clamp diodes so it can be driven above VCC through a current-limiting resistor. |
| 3 | 1CP | input | Clock input for flip-flop 1, edge-triggered on the low-to-high transition. |
| 4 | 1SD | input | Asynchronous set input for flip-flop 1, active low; when low with 1RD high, it forces 1Q high and 1Q̄ low. |
| 5 | 1Q | output | True output of flip-flop 1, which follows the stored data D on each clock rising edge. |
| 6 | 1Q̄ | output | Inverted (complementary) output of flip-flop 1. |
| 7 | GND | power_in | Ground reference, 0 V. |
| 8 | 2Q̄ | output | Inverted (complementary) output of flip-flop 2. |
| 9 | 2Q | output | True output of flip-flop 2, which follows the stored data 2D on each clock rising edge. |
| 10 | 2SD | input | Asynchronous set input for flip-flop 2, active low; when low with 2RD high, it forces 2Q high and 2Q̄ low. |
| 11 | 2CP | input | Clock input for flip-flop 2, edge-triggered on the low-to-high transition. |
| 12 | 2D | input | Data input for flip-flop 2, sampled on the low-to-high transition of 2CP; the datasheet notes the input has clamp diodes so it can be driven above VCC through a current-limiting resistor. |
| 13 | 2RD | input | Asynchronous reset input for flip-flop 2, active low; when low with 2SD high, it forces 2Q low and 2Q̄ high. |
| 14 | VCC | power_in | Supply voltage: 2.0 V to 6.0 V recommended for SN74HC74 and 4.5 V to 5.5 V for SN74HCT74, with absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 电源电压 (Supply voltage), absolute max | VCC | -0.5 | 7 | V | 7 | ||
| 输入钳位电流 (Input clamp current) | IIK | -20 | 20 | mA | VI<-0.5V 或 VI>VCC+0.5V | 7 | |
| 输出钳位电流 (Output clamp current) | IOK | -20 | 20 | mA | VO<-0.5V 或 VO>VCC+0.5V | 7 | |
| 输出电流 (Output current) | IO | -25 | 25 | mA | -0.5V<VO<VCC+0.5V | 7 | |
| 电源电流 (Supply current) | ICC | 100 | mA | 7 | |||
| 地电流 (Ground current) | IGND | -100 | mA | 7 | |||
| 总功耗 (Total power dissipation) | Ptot | 500 | mW | 7 | |||
| 贮存温度 (Storage temperature) | Tstg | -65 | 150 | ℃ | 7 | ||
| 焊接温度 (Soldering temperature), DIP package | TL | 245 | ℃ | 10 s, DIP | 7 | ||
| 电源电压 (Supply voltage), recommended | VCC | 2 | 5 | 6 | V | 7 | |
| 输入电压 (Input voltage) | VI | 0 | V | 7 | |||
| 输出电压 (Output voltage) | VO | 0 | V | 7 | |||
| 输入上升和下降转换速率 (Input rise and fall rate) | Δt/ΔV | 625 | ns/V | VCC=2.0V | 7 | ||
| 输入上升和下降转换速率 (Input rise and fall rate) | Δt/ΔV | 1.67 | 139 | ns/V | VCC=4.5V | 7 | |
| 输入上升和下降转换速率 (Input rise and fall rate) | Δt/ΔV | 83 | ns/V | VCC=6.0V | 7 | ||
| 工作环境温度 (Operating ambient temperature) | Tamb | -40 | 105 | ℃ | 7 | ||
| 高电平输入电压 (High-level input voltage) | VIH | 1.5 | V | Tamb=-40℃～+105℃; VCC=2.0V | 9 | ||
| 高电平输入电压 (High-level input voltage) | VIH | 3.15 | V | Tamb=-40℃～+105℃; VCC=4.5V | 9 | ||
| 高电平输入电压 (High-level input voltage) | VIH | 4.2 | V | Tamb=-40℃～+105℃; VCC=6.0V | 9 | ||
| 低电平输入电压 (Low-level input voltage) | VIL | 0.5 | V | Tamb=-40℃～+105℃; VCC=2.0V | 9 | ||
| 低电平输入电压 (Low-level input voltage) | VIL | 1.35 | V | Tamb=-40℃～+105℃; VCC=4.5V | 9 | ||
| 低电平输入电压 (Low-level input voltage) | VIL | 1.8 | V | Tamb=-40℃～+105℃; VCC=6.0V | 9 | ||
| 高电平输出电压 (High-level output voltage) | VOH | 3.7 | V | Tamb=-40℃～+105℃; VI=VIH或VIL; IO=-4.0mA; VCC=4.5V | 9 | ||
| 高电平输出电压 (High-level output voltage) | VOH | 5.2 | V | Tamb=-40℃～+105℃; VI=VIH或VIL; IO=-5.2mA; VCC=6.0V | 9 | ||
| 低电平输出电压 (Low-level output voltage) | VOL | 0.4 | V | Tamb=-40℃～+105℃; VI=VIH或VIL; IO=4.0mA; VCC=4.5V | 9 | ||
| 输入漏电流 (Input leakage current) | II | -1 | 1 | uA | Tamb=-40℃～+105℃; VI=VCC或GND; VCC=6.0V | 9 | |
| 静态电流 (Quiescent supply current) | ICC | 80 | uA | Tamb=-40℃～+105℃; VI=VCC或GND; IO=0A; VCC=6.0V | 9 | ||
| nCP到nQ, nQ 传输延时 (Propagation delay) | tpd | 265 | ns | Tamb=-40℃～+105℃; 见图6; VCC=2.0V | 12 | ||
| nCP到nQ, nQ 传输延时 (Propagation delay) | tpd | 53 | ns | Tamb=-40℃～+105℃; 见图6; VCC=4.5V | 12 | ||
| nCP到nQ, nQ 传输延时 (Propagation delay) | tpd | 45 | ns | Tamb=-40℃～+105℃; 见图6; VCC=6.0V | 12 | ||
| nSD到nQ, nQ 传输延时 (Propagation delay) | tpd | 300 | ns | Tamb=-40℃～+105℃; 见图7; VCC=2.0V | 12 | ||
| nSD到nQ, nQ 传输延时 (Propagation delay) | tpd | 60 | ns | Tamb=-40℃～+105℃; 见图7; VCC=4.5V | 12 | ||
| nSD到nQ, nQ 传输延时 (Propagation delay) | tpd | 51 | ns | Tamb=-40℃～+105℃; 见图7; VCC=6.0V | 12 | ||
| nRD到nQ, nQ 传输延时 (Propagation delay) | tpd | 300 | ns | Tamb=-40℃～+105℃; 见图7; VCC=2.0V | 12 | ||
| nRD到nQ, nQ 传输延时 (Propagation delay) | tpd | 60 | ns | Tamb=-40℃～+105℃; 见图7; VCC=4.5V | 12 | ||
| nRD到nQ, nQ 传输延时 (Propagation delay) | tpd | 51 | ns | Tamb=-40℃～+105℃; 见图7; VCC=6.0V | 12 | ||
| nQ, nQ 转换时间 (Output transition time) | tt | 110 | ns | Tamb=-40℃～+105℃; 见图6; VCC=2.0V | 12 | ||
| nQ, nQ 转换时间 (Output transition time) | tt | 22 | ns | Tamb=-40℃～+105℃; 见图6; VCC=4.5V | 12 | ||
| nQ, nQ 转换时间 (Output transition time) | tt | 19 | ns | Tamb=-40℃～+105℃; 见图6; VCC=6.0V | 12 | ||
| CP脉宽 (Clock pulse width) | tW | 120 | ns | Tamb=-40℃～+105℃; 见图6; VCC=2.0V | 12 | ||
| CP脉宽 (Clock pulse width) | tW | 24 | ns | Tamb=-40℃～+105℃; 见图6; VCC=4.5V | 12 | ||
| CP脉宽 (Clock pulse width) | tW | 20 | ns | Tamb=-40℃～+105℃; 见图6; VCC=6.0V | 12 | ||
| nSD, nRD 脉宽 (Set/reset pulse width) | tW | 120 | ns | Tamb=-40℃～+105℃; 见图7; VCC=2.0V | 12 | ||
| nSD, nRD 脉宽 (Set/reset pulse width) | tW | 24 | ns | Tamb=-40℃～+105℃; 见图7; VCC=4.5V | 12 | ||
| nSD, nRD 脉宽 (Set/reset pulse width) | tW | 20 | ns | Tamb=-40℃～+105℃; 见图7; VCC=6.0V | 12 | ||
| nSD, nRD 恢复时间 (Recovery time) | trec | 45 | ns | Tamb=-40℃～+105℃; 见图7; VCC=2.0V | 12 | ||
| nSD, nRD 恢复时间 (Recovery time) | trec | 9 | ns | Tamb=-40℃～+105℃; 见图7; VCC=4.5V | 12 | ||
| nSD, nRD 恢复时间 (Recovery time) | trec | 8 | ns | Tamb=-40℃～+105℃; 见图7; VCC=6.0V | 12 | ||
| nD到nCP 设置时间 (Setup time) | tsu | 90 | ns | Tamb=-40℃～+105℃; 见图6; VCC=2.0V | 12 | ||
| nD到nCP 设置时间 (Setup time) | tsu | 18 | ns | Tamb=-40℃～+105℃; 见图6; VCC=4.5V | 12 | ||
| nD到nCP 设置时间 (Setup time) | tsu | 15 | ns | Tamb=-40℃～+105℃; 见图6; VCC=6.0V | 12 | ||
| nD到nCP 保持时间 (Hold time) | th | 3 | ns | Tamb=-40℃～+105℃; 见图6; VCC=2.0V | 12 | ||
| nCP最大频率 (Maximum clock frequency) | fmax | 4 | MHz | Tamb=-40℃～+105℃; 见图6; VCC=2.0V | 12 | ||
| nCP最大频率 (Maximum clock frequency) | fmax | 20 | MHz | Tamb=-40℃～+105℃; 见图6; VCC=4.5V | 12 | ||
| nCP最大频率 (Maximum clock frequency) | fmax | 24 | MHz | Tamb=-40℃～+105℃; 见图6; VCC=6.0V | 12 |
CAD (KiCad official)
- Symbol:
SN74HC74N - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hc74n-etched.step/sn74hc74n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc74n.step/sn74hc74n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (19 pp, sha256
a4e81792f1aa0ed1, retrieved 2026-10-16, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).