component
LTC5582IDD#TRPBF
Public Unreviewedby Ray
Analog Devices RF Detectors, DFN-10-EP(3x3). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownLTC5582IDD#TRPBF
Analog Devices · RF Detectors · DFN-10-EP(3x3)
LTC5582IDD#TRPBF from Analog Devices, in a DFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply pin with supply voltage 3.1V to 3.5V and typical current consumption 41.6mA at 3.3V. |
| 2 | IN+ | input | Differential RF input signal pin internally biased to 1.585V with 400Ω differential impedance; requires DC blocking. |
| 3 | DEC | passive | Input common mode decoupling pin internally biased to 1.585V with internal 50pF capacitor to ground and 200Ω impedance to IN+/IN-. |
| 4 | IN- | input | Differential RF input signal pin internally biased to 1.585V with 400Ω differential impedance; requires DC blocking. |
| 5 | GND | power_in | Circuit ground return for the entire IC that must be soldered to PCB ground plane. |
| 6 | OUT | output | DC output power measurement pin with Class AB buffer amplifier capable of sourcing and sinking ±5mA current with 100Ω output impedance. |
| 7 | RT2 | input | Optional 2nd-order temperature compensation control pin for output voltage adjustment; connect to ground to disable compensation. |
| 8 | RT1 | input | Optional 1st-order temperature compensation control pin for output voltage adjustment; connect to ground to disable compensation. |
| 9 | EN | input | Enable/disable control pin requiring voltage above 1V to activate bias circuits and below 0.4V to disable chip; must not exceed VCC by more than 0.3V. |
| 10 | FLTR | passive | External filtering capacitor connection point internally biased at VCC − 0.43V via 1.2kΩ resistor; minimum 8nF capacitor to VCC required for stable operation. |
| 11 | GND | power_in | Exposed pad circuit ground return for the entire IC that must be soldered to PCB ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-10-EP(3x3) |
| Category | RF And Wireless |
| Pins | 11 |
CAD (KiCad official)
- Symbol:
LTC5582IDD#TRPBF - Footprint:
Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm - 3D model: DFN-10-EP(3x3) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (18 pp, sha256
8284c581d910a602, retrieved 2026-09-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).