component
HEF4069UBTT
Public Made by Adomby adom
Nexperia Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHEF4069UBTT
Nexperia · Inverters · TSSOP-14
HEF4069UBTT from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of inverter 1; includes clamp diodes, so a current limiting resistor allows interfacing to voltages above VDD. |
| 2 | 1Y | output | Output of inverter 1. |
| 3 | 2A | input | Data input of inverter 2; includes clamp diodes, input voltage range 0 V to VDD. |
| 4 | 2Y | output | Output of inverter 2. |
| 5 | 3A | input | Data input of inverter 3; includes clamp diodes, input voltage range 0 V to VDD. |
| 6 | 3Y | output | Output of inverter 3. |
| 7 | VSS | power_in | Ground (0 V). |
| 8 | 4Y | output | Output of inverter 4. |
| 9 | 4A | input | Data input of inverter 4; includes clamp diodes, input voltage range 0 V to VDD. |
| 10 | 5Y | output | Output of inverter 5. |
| 11 | 5A | input | Data input of inverter 5; includes clamp diodes, input voltage range 0 V to VDD. |
| 12 | 6Y | output | Output of inverter 6. |
| 13 | 6A | input | Data input of inverter 6; includes clamp diodes, input voltage range 0 V to VDD. |
| 14 | VDD | power_in | Supply voltage, 3 V to 15 V recommended (absolute maximum 18 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | -0.5 | 18 | V | 3 | ||
| Input clamping current | IIK | -10 | 10 | mA | VI < -0.5 V or VI > VDD + 0.5 V | 3 | |
| Output clamping current | IOK | -10 | 10 | mA | VO < -0.5 V or VO > VDD + 0.5 V | 3 | |
| Input/output current | II/O | -10 | 10 | mA | 3 | ||
| Supply current | IDD | 50 | mA | 3 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Ambient temperature | Tamb | -40 | 125 | °C | 3 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C; TSSOP14 derates linearly with 7.3 mW/K above 81 °C | 3 | ||
| Power dissipation per output | P | 100 | mW | 3 | |||
| Supply voltage | VDD | 3 | 15 | V | 3 | ||
| Input voltage | VI | 0 | 15 | V | max printed as VDD | 3 | |
| Ambient temperature | Tamb | -40 | 125 | °C | in free air | 3 | |
| HIGH-level input voltage | VIH | 4 | V | VDD = 5 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| HIGH-level input voltage | VIH | 8 | V | VDD = 10 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| HIGH-level input voltage | VIH | 12.5 | V | VDD = 15 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| LOW-level input voltage | VIL | 1 | V | VDD = 5 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| LOW-level input voltage | VIL | 2 | V | VDD = 10 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| LOW-level input voltage | VIL | 2.5 | V | VDD = 15 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| HIGH-level output voltage | VOH | 4.95 | V | VDD = 5 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| HIGH-level output voltage | VOH | 9.95 | V | VDD = 10 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| HIGH-level output voltage | VOH | 14.95 | V | VDD = 15 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| LOW-level output voltage | VOL | 0.05 | V | VDD = 5 V; /IO/ < 1 μA; Tamb = +25 °C | 3 | ||
| HIGH-level output current | IOH | -1.4 | mA | VO = 2.5 V; VDD = 5 V; Tamb = +25 °C | 4 | ||
| HIGH-level output current | IOH | -0.5 | mA | VO = 4.6 V; VDD = 5 V; Tamb = +25 °C | 4 | ||
| HIGH-level output current | IOH | -1.3 | mA | VO = 9.5 V; VDD = 10 V; Tamb = +25 °C | 4 | ||
| HIGH-level output current | IOH | -3.4 | mA | VO = 13.5 V; VDD = 15 V; Tamb = +25 °C | 4 | ||
| LOW-level output current | IOL | 0.5 | mA | VO = 0.4 V; VDD = 5 V; Tamb = +25 °C | 4 | ||
| LOW-level output current | IOL | 1.3 | mA | VO = 0.5 V; VDD = 10 V; Tamb = +25 °C | 4 | ||
| LOW-level output current | IOL | 3.4 | mA | VO = 1.5 V; VDD = 15 V; Tamb = +25 °C | 4 | ||
| Input leakage current | II | -0.1 | 0.1 | μA | VDD = 15 V; Tamb = +25 °C | 4 | |
| Input leakage current | II | -1 | 1 | μA | VDD = 15 V; Tamb = +125 °C | 4 | |
| Supply current | IDD | 0.25 | μA | VDD = 5 V; all valid input combinations; IO = 0 A; Tamb = +25 °C | 4 | ||
| Supply current | IDD | 0.5 | μA | VDD = 10 V; all valid input combinations; IO = 0 A; Tamb = +25 °C | 4 | ||
| Supply current | IDD | 1 | μA | VDD = 15 V; all valid input combinations; IO = 0 A; Tamb = +25 °C | 4 | ||
| Supply current | IDD | 7.5 | μA | VDD = 5 V; all valid input combinations; IO = 0 A; Tamb = +125 °C | 4 | ||
| Supply current | IDD | 15 | μA | VDD = 10 V; all valid input combinations; IO = 0 A; Tamb = +125 °C | 4 | ||
| Supply current | IDD | 30 | μA | VDD = 15 V; all valid input combinations; IO = 0 A; Tamb = +125 °C | 4 | ||
| HIGH to LOW propagation delay | tPHL | 45 | 90 | ns | nA to nY; VDD = 5 V; Tamb = 25 °C | 4 | |
| HIGH to LOW propagation delay | tPHL | 20 | 40 | ns | nA to nY; VDD = 10 V; Tamb = 25 °C | 4 | |
| HIGH to LOW propagation delay | tPHL | 15 | 25 | ns | nA to nY; VDD = 15 V; Tamb = 25 °C | 4 | |
| LOW to HIGH propagation delay | tPLH | 40 | 80 | ns | nA to nY; VDD = 5 V; Tamb = 25 °C | 4 | |
| LOW to HIGH propagation delay | tPLH | 20 | 40 | ns | nA to nY; VDD = 10 V; Tamb = 25 °C | 4 | |
| LOW to HIGH propagation delay | tPLH | 15 | 30 | ns | nA to nY; VDD = 15 V; Tamb = 25 °C | 4 | |
| HIGH to LOW output transition time | tTHL | 60 | 120 | ns | output nY; VDD = 5 V; Tamb = 25 °C | 4 | |
| HIGH to LOW output transition time | tTHL | 30 | 60 | ns | output nY; VDD = 10 V; Tamb = 25 °C | 4 | |
| HIGH to LOW output transition time | tTHL | 20 | 40 | ns | output nY; VDD = 15 V; Tamb = 25 °C | 4 | |
| LOW to HIGH output transition time | tTLH | 60 | 120 | ns | output nY; VDD = 5 V; Tamb = 25 °C | 4 | |
| LOW to HIGH output transition time | tTLH | 30 | 60 | ns | output nY; VDD = 10 V; Tamb = 25 °C | 4 | |
| LOW to HIGH output transition time | tTLH | 20 | 40 | ns | output nY; VDD = 15 V; Tamb = 25 °C | 4 | |
| Input capacitance | CI | 7.5 | pF | digital inputs; Tamb = +25 °C | 4 |
CAD (KiCad official)
- Symbol:
HEF4069UBTT - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
hef4069ubtt-etched.step/hef4069ubtt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hef4069ubtt.step/hef4069ubtt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (13 pp, sha256
479940d50b7b564a, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).