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Contents

README

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AT45DB641E-SHN-T

Dialog Semiconductor Adesto Adesto Technologies · NOR FLASH · SOIC-8-208mil

AT45DB641E-SHN-T from Dialog Semiconductor Adesto Adesto Technologies, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SI input Serial Input pin used for shifting data into the device; all data including command and address sequences are latched on the rising edge of SCK and ignored when the device is deselected (CS deasserted).
2 SCK input Serial Clock pin used to provide clock to the device and control the flow of data to and from the device; command, address, and input data on SI pin are latched on the rising edge of SCK, while output data on SO pin are clocked out on the falling edge of SCK.
3 RESET input Reset pin; a low state will terminate the operation in progress and reset the internal state machine to an idle state; the device will remain in the reset condition as long as a low level is present on this pin and normal operation resumes once the pin is brought back to a high level.
4 CS input Chip Select pin; a high-to-low transition is required to start an operation and a low-to-high transition is required to end an operation; when deasserted (high), the device is placed in standby mode and the SO pin goes to high-impedance state.
5 SO tri_state Serial Output pin used to shift data out from the device; data on the SO pin is always clocked out on the falling edge of SCK and placed in a high-impedance state whenever the device is deselected (CS deasserted).
6 GND power_in Ground reference for the power supply; must be connected to the system ground.
7 VCC power_in Device power supply pin; accepts operating voltage from 1.7V minimum to 3.6V maximum for erase, program, and read operations.
8 WP input Write Protect pin; when asserted (low), all sectors specified for protection by the Sector Protection Register are protected against program and erase operations regardless of software control methods; internally pulled high and may be left floating if hardware protection will not be used.

Key specifications

Parameter Value
Manufacturer Dialog Semiconductor Adesto Adesto Technologies
Package SOIC-8-208mil
Category Memory
Pins 8

CAD (KiCad official)

  • Symbol: AT45DB641E-SHN-T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: at45db641e-shn-t-etched.step / at45db641e-shn-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at45db641e-shn-t.step / at45db641e-shn-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Dialog Semiconductor Adesto Adesto Technologies datasheet (71 pp, sha256 3162a8930db9136f, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF