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M95512-RMN6P
Public Made by Adomby adom
STMicroelectronics Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownM95512-RMN6P
STMicroelectronics · Pre-ordered Chips · SOIC-8
M95512-RMN6P from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip select: when high the device is deselected, Q is high impedance and the device is in Standby Power mode; driving it low selects the device, and a falling edge is required after power-up before any instruction. |
| 2 | Q | output | Serial data output: data is shifted out on the falling edge of Serial clock (C), and the pin is high impedance when deselected or during Hold. |
| 3 | W | input | Write protect: freezes the size of the memory area protected by BP1/BP0 (with SRWD, low enters Hardware Protected mode); must be driven high or low and stable during all Write instructions. |
| 4 | VSS | power_in | Ground: the reference for all signals, including the VCC supply voltage. |
| 5 | D | input | Serial data input: receives instructions, addresses and data to be written, latched on the rising edge of Serial clock (C). |
| 6 | C | input | Serial clock: provides the timing of the serial interface, with inputs latched on the rising edge and Q changing from the falling edge, up to 16 MHz. |
| 7 | HOLD | input | Hold: pauses serial communication without deselecting the device; during Hold Q is high impedance and D and C are Don't Care. |
| 8 | VCC | power_in | Supply voltage: 2.5 V to 5.5 V for M95512-W, 1.8 V to 5.5 V for M95512-R, 1.7 V to 5.5 V for M95512-DF; must be stable during operation and decoupled with 10 to 100 nF close to the pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 1.8 | 5.5 | V | M95512-R, device grade 6 | 33 | |
| Ambient operating temperature | TA | -40 | 85 | °C | M95512-R, device grade 6 | 33 | |
| Ambient operating temperature (absolute max) | TAMB | -40 | 130 | °C | 32 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 32 | ||
| Output voltage | VO | -0.5 | V | Max is VCC+0.6 | 32 | ||
| Input voltage | VI | -0.5 | 6.5 | V | 32 | ||
| Supply voltage (absolute max) | VCC | -0.5 | 6.5 | V | 32 | ||
| DC output current (Q = 0) | IOL | 5 | mA | Q = 0 | 32 | ||
| DC output current (Q = 1) | IOH | 5 | mA | Q = 1 | 32 | ||
| Electrostatic discharge voltage (HBM) | VESD | 4000 | V | Human body model; 3000 V for devices identified by process letters KA | 32 | ||
| Input leakage current | ILI | -2 | 2 | µA | VIN = VSS or VCC | 37 | |
| Output leakage current | ILO | -2 | 2 | µA | S = VCC, voltage applied on Q = VSS or VCC | 37 | |
| Supply current (Read) | ICC | 2.5 | mA | C = 0.1 VCC / 0.9 VCC at max clock frequency, VCC = 1.8 V, Q = open | 37 | ||
| Supply current (Write) | ICC0 | 1.5 | mA | During tW, S = VCC, 1.8 V < VCC < 2.5 V | 37 | ||
| Supply current (Standby Power mode) | ICC1 | 1 | µA | S = VCC, VCC = 1.8 V, VIN = VSS or VCC | 37 | ||
| Input low voltage | VIL | -0.45 | V | Max is 0.3 VCC | 37 | ||
| Output low voltage | VOL | 0.3 | V | IOL = 0.15 mA, VCC = 1.8 V | 37 | ||
| Output capacitance (Q) | COUT | 8 | pF | VOUT = 0 V, TA = 25 °C, 5 MHz | 34 | ||
| Input capacitance (D) | CIN | 8 | pF | VIN = 0 V, TA = 25 °C, 5 MHz | 34 | ||
| Input capacitance (other pins) | CIN | 6 | pF | VIN = 0 V, TA = 25 °C, 5 MHz | 34 | ||
| Write cycle endurance | Ncycle | 4e+06 | Write cycle | TA ≤ 25 °C, VCC(min) < VCC < VCC(max) | 34 | ||
| Write cycle endurance | Ncycle | 1.2e+06 | Write cycle | TA = 85 °C, VCC(min) < VCC < VCC(max) | 34 | ||
| Data retention | 200 | Year | TA = 55 °C | 34 | |||
| Clock frequency | fC | 5 | MHz | Current products; min is D.C. | 41 | ||
| S active setup time | tSLCH | 60 | ns | Current products | 41 | ||
| S not active setup time | tSHCH | 60 | ns | Current products | 41 | ||
| S deselect time | tSHSL | 90 | ns | Current products | 41 | ||
| S active hold time | tCHSH | 60 | ns | Current products | 41 | ||
| S not active hold time | tCHSL | 60 | ns | Current products | 41 | ||
| Clock high time | tCH | 80 | ns | Current products | 41 | ||
| Clock low time | tCL | 80 | ns | Current products | 41 | ||
| Clock rise time | tCLCH | 2 | µs | Current products; characterized only | 41 | ||
| Clock fall time | tCHCL | 2 | µs | Current products; characterized only | 41 | ||
| Data in setup time | tDVCH | 20 | ns | Current products | 41 | ||
| Data in hold time | tCHDX | 20 | ns | Current products | 41 | ||
| Clock low hold time after HOLD not active | tHHCH | 60 | ns | Current products | 41 | ||
| Clock low hold time after HOLD active | tHLCH | 60 | ns | Current products | 41 | ||
| Clock low setup time before HOLD active | tCLHL | 0 | ns | Current products | 41 | ||
| Clock low setup time before HOLD not active | tCLHH | 0 | ns | Current products | 41 | ||
| Output disable time | tSHQZ | 80 | ns | Current products; characterized only | 41 | ||
| Clock low to output valid | tCLQV | 80 | ns | Current products | 41 | ||
| Output hold time | tCLQX | 0 | ns | Current products | 41 | ||
| Output rise time | tQLQH | 80 | ns | Current products; characterized only | 41 | ||
| Output fall time | tQHQL | 80 | ns | Current products; characterized only | 41 | ||
| HOLD high to output valid | tHHQV | 80 | ns | Current products | 41 | ||
| HOLD low to output High-Z | tHLQZ | 80 | ns | Current products; characterized only | 41 | ||
| Write time | tW | 5 | ms | Current products | 41 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | TLEAD Lead temperature during soldering See note (1) 1. Compliant with JEDEC standard J-STD-020D (for small-body, Sn-Pb or Pb free assembly), the ST | 32 |
CAD (KiCad official)
- Symbol:
M95512-RMN6P - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
m95512-rmn6p-etched.step/m95512-rmn6p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);m95512-rmn6p.step/m95512-rmn6p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (54 pp, sha256
46546a73b781e404, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).