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Contents

README

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CD74HC574M96

Texas Instruments · Flip Flops · SOIC-20-300mil

CD74HC574M96 from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-LOW 3-state output enable; when HIGH all Q outputs enter high-impedance state, independent of CP or D inputs.
2 D0 input Data input 0; logic level is captured into the flip-flop on the LOW-to-HIGH transition of CP.
3 D1 input Data input 1; logic level is captured into the flip-flop on the LOW-to-HIGH transition of CP.
4 D2 input Data input 2; logic level is captured into the flip-flop on the LOW-to-HIGH transition of CP.
5 D3 input Data input 3; logic level is captured into the flip-flop on the LOW-to-HIGH transition of CP.
6 D4 input Data input 4; logic level is captured into the flip-flop on the LOW-to-HIGH transition of CP.
7 D5 input Data input 5; logic level is captured into the flip-flop on the LOW-to-HIGH transition of CP.
8 D6 input Data input 6; logic level is captured into the flip-flop on the LOW-to-HIGH transition of CP.
9 D7 input Data input 7; logic level is captured into the flip-flop on the LOW-to-HIGH transition of CP.
10 GND power_in Ground supply reference; continuous current through GND pin not to exceed ±50 mA.
11 CP input Clock input; all eight flip-flops capture their D inputs on the LOW-to-HIGH transition; maximum clock frequency 30 MHz (typ) at VCC = 4.5 V.
12 Q7 tri_state 3-state registered output 7; capable of driving 15 LSTTL loads; enters high-impedance state when OE is HIGH.
13 Q6 tri_state 3-state registered output 6; capable of driving 15 LSTTL loads; enters high-impedance state when OE is HIGH.
14 Q5 tri_state 3-state registered output 5; capable of driving 15 LSTTL loads; enters high-impedance state when OE is HIGH.
15 Q4 tri_state 3-state registered output 4; capable of driving 15 LSTTL loads; enters high-impedance state when OE is HIGH.
16 Q3 tri_state 3-state registered output 3; capable of driving 15 LSTTL loads; enters high-impedance state when OE is HIGH.
17 Q2 tri_state 3-state registered output 2; capable of driving 15 LSTTL loads; enters high-impedance state when OE is HIGH.
18 Q1 tri_state 3-state registered output 1; capable of driving 15 LSTTL loads; enters high-impedance state when OE is HIGH.
19 Q0 tri_state 3-state registered output 0; capable of driving 15 LSTTL loads; enters high-impedance state when OE is HIGH.
20 VCC power_in Positive supply voltage; HC type: 2 V to 6 V; continuous current not to exceed ±50 mA; decouple with 0.1 µF close to pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: CD74HC574M96
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: cd74hc574m96-etched.step / cd74hc574m96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc574m96.step / cd74hc574m96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 9958d4197189930d, retrieved 2026-09-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-4-6 (text+vision), consensus claude-opus-4-7 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF