component
TPS7433D
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS7433D
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
TPS7433D from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable input; applying a TTL high signal shuts down the regulator and reduces quiescent current to less than 1 µA at TJ = 25°C, and the voltage at EN must stay between -0.3 V and VI + 0.3 V. |
| 2 | NC | unconnected | Not connected internally; no internal connection to the regulator. |
| 3 | NC | unconnected | Not connected internally; no internal connection to the regulator. |
| 4 | IN | power_in | Input voltage; recommended input range is 2.5 V to 7 V, with an absolute maximum of 8 V, and an input bypass capacitor of 1 µF or larger improves load transient response and noise rejection when the device is far from the supply. |
| 5 | IN | power_in | Input voltage; recommended input range is 2.5 V to 7 V, with an absolute maximum of 8 V (pin 5 is internally tied to pin 4 as a second IN pin). |
| 6 | GND | power_in | Regulator ground; the output capacitor (minimum 1 µF, ESR at least 300 mΩ) must be connected between OUT and this GND pin. |
| 7 | OUT | power_out | Regulated output voltage; output capacitor minimum 1 µF with ESR of at least 300 mΩ is required between OUT and GND for stability. |
| 8 | SENSE | input | Sense input that must be connected to the regulator output for proper functioning; routing should minimize noise pickup and an RC filter between SENSE and OUT is not recommended because it can cause oscillation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS7433D - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tps7433d-etched.step/tps7433d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps7433d.step/tps7433d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
9ef97f95beada1cf, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).