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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

F280038CPMRQ1

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

F280038CPMRQ1 from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GPIO29	bidirectional	General-purpose I/O GPIO29, which Table 5-3 lists with SCI-A transmit (SCIA_TX) as one of its muxed functions.
2	GPIO28	bidirectional	General-purpose I/O GPIO28, which Table 5-3 lists with SCI-A receive (SCIA_RX) as one of its muxed functions.
3	XRSn	input	Active-low device reset (XRSn is low while reset is active) with internal pullup active.
4	VDD	power_in	1.2-V digital logic power pin; recommended supply is 1.14 V to 1.32 V (nominal 1.2 V).
5	VSS	power_in	Digital ground; all VSS pins must be connected to board ground.
6	A6	input	ADC-A analog input 6, also usable as a CMPSS-1 comparator input and as digital input AIO228.
7	B2/C6	input	ADC-B input 2 and ADC-C input 6 (shared pin), also a CMPSS-3 comparator positive input and digital input AIO226.
8	A3/B3/C5/VDAC	input	ADC-A input 3 shared with ADC-B/C inputs and VDAC; VDAC is an optional external reference for the on-chip COMPDACs and needs at least 1 µF if used as a reference.
9	A2/B6/C9	input	ADC-A input 2 shared with ADC-B input 6 and ADC-C input 9, also a CMPSS-1 comparator positive input and digital input AIO224.
10	A15/B9/C7	input	ADC-A input 15 shared with ADC-B input 9 and ADC-C input 7, also a CMPSS-1 comparator input and digital input AIO233.
11	A14/B14/C4	input	ADC-A input 14 shared with ADC-B input 14 and ADC-C input 4, also a CMPSS-3 comparator input and digital input AIO239.
12	A11/B10/C0	input	ADC-A input 11 shared with ADC-B input 10 and ADC-C input 0, also a CMPSS-1 comparator input and digital input AIO237.
13	A5/B12/C2	input	ADC-A input 5 shared with ADC-B input 12 and ADC-C input 2, also CMPSS-2/3 comparator inputs and digital input AIO244 where applicable.
14	A1/B7/DACB_OUT	input	ADC-A input 1 shared with ADC-B input 7; this pin is also the buffered DAC-B output (DACB_OUT) and digital input AIO232.
15	A0/B15/C15/DACA_OUT	input	ADC-A input 0 shared with ADC-B input 15 and ADC-C input 15; this pin is also the buffered DAC-A output (DACA_OUT) and digital input AIO231.
16	VREFHI	input	ADC high reference voltage; tie to VDDA if the ADC is not used in the application.
17	VREFLO	input	ADC low reference voltage; tie to VSSA.
18	A12/C1	input	ADC-A input 12 shared with ADC-C input 1, also CMPSS-2 comparator input and digital input AIO238.
19	A7/C3	input	ADC-A input 7 shared with ADC-C input 3, also a CMPSS-4 comparator input and digital input AIO245.
20	A8/B0/C11	input	ADC-A input 8 shared with ADC-B input 0 and ADC-C input 11, also CMPSS-2/4 comparator inputs and digital inputs AIO240/AIO253.
21	VSSA	power_in	Analog ground; if an analog ground is not used, tie to VSS.
22	VDDA	power_in	3.3-V analog power pin; place a minimum 2.2-µF decoupling capacitor on the pin and tie to VDDIO if no dedicated analog supply is used.
23	A4/B8/C14	input	ADC-A input 4 shared with ADC-B input 8 and ADC-C input 14, also a CMPSS-2 comparator input and digital input AIO225.
24	A9/B4/C8	input	ADC-A input 9 shared with ADC-B input 4 and ADC-C input 8, also a CMPSS-2 comparator input and digital inputs AIO227/AIO236.
25	A10/B1/C10	input	ADC-A input 10 shared with ADC-B input 1 and ADC-C input 10, also a CMPSS-2 comparator input and digital input AIO230.
26	VSS	power_in	Digital ground; all VSS pins must be connected to board ground.
27	VDD	power_in	1.2-V digital logic power pin; recommended supply is 1.14 V to 1.32 V (nominal 1.2 V).
28	VDDIO	power_in	3.3-V digital I/O power pin; the device supply for VDDIO and VDDA is 3.3 V nominal with a 3.63 V maximum.
29	GPIO13	bidirectional	General-purpose I/O GPIO13; alternate functions include EPWM7_B, MCAN_TX, SCI-B receive, PMBus-A alert (open-drain) and CAN-A transmit.
30	GPIO12	bidirectional	General-purpose I/O GPIO12; alternate functions include EPWM7_A, MCAN_RX, EQEP1_STROBE, SCI-B transmit, PMBus-A control and CAN-A receive.
31	GPIO11	bidirectional	General-purpose I/O GPIO11; alternate functions include EPWM6_B, EQEP1_B, SCI-B receive, SPI-A STE and LIN-B receive.
32	GPIO33	bidirectional	General-purpose I/O GPIO33; its alternate-function assignments are not in the supplied text.
33	GPIO16	bidirectional	General-purpose I/O GPIO16; alternate functions include SPI-A SIMO, EPWM5_A, SCI-A transmit, SD1_D1, PMBus-A clock (open-drain) and XCLKOUT.
34	GPIO17	bidirectional	General-purpose I/O GPIO17; alternate functions include SPI-A SOMI, EPWM5_B, SCI-A receive, SD1_C1, PMBus-A data (open-drain) and CAN-A transmit.
35	GPIO24	bidirectional	General-purpose I/O GPIO24; alternate functions include EPWM8_A, EQEP2_A, SPI-B SIMO, LIN-B transmit, PMBus-A clock (open-drain), SCI-A transmit and ERRORSTS.
36	TCK	input	JTAG test clock input; internal pullup is active, and the datasheet allows either no connect or a pullup resistor on this pin.
37	GPIO37/TDO	tri_state	JTAG test data output (TDO, default mux); it tristates when there is no JTAG activity, so an internal or external pullup must be used to avoid a floating input.
38	TMS	input	JTAG test mode select input; internal pullup is active and an external pullup resistor is recommended.
39	GPIO35/TDI	input	JTAG test data input (TDI, default mux); the internal pullup is disabled by default, so it must be enabled or an external pullup added if used as TDI.
40	GPIO32	bidirectional	General-purpose I/O GPIO32; its alternate-function assignments are not in the supplied text.
41	GPIO18/X2	bidirectional	Crystal oscillator output X2 (alternate function) and also GPIO18, whose alternate functions include SPI-A clock, SCI-B transmit, CAN-A receive and I2C-A clock (open-drain).
42	GPIO19/X1	bidirectional	Crystal oscillator input or single-ended 3.3-V clock input X1 (alternate function) and also GPIO19; the initialization software must configure this pin before the crystal oscillator is enabled.
43	VDDIO	power_in	3.3-V digital I/O power pin; the device supply for VDDIO and VDDA is 3.3 V nominal with a 3.63 V maximum.
44	VDD	power_in	1.2-V digital logic power pin; recommended supply is 1.14 V to 1.32 V (nominal 1.2 V).
45	VSS	power_in	Digital ground; all VSS pins must be connected to board ground.
46	VREGENZ	input	Internal voltage regulator disable with internal pulldown; tie low to VSS to enable the internal VREG or high to VDDIO to use an external supply.
47	GPIO8	bidirectional	General-purpose I/O GPIO8; Table 5-3 lists SCI-A transmit (SCIA_TX) as one of its muxed functions.
48	GPIO4	bidirectional	General-purpose I/O GPIO4; its alternate-function assignments are not in the supplied text.
49	GPIO3	bidirectional	General-purpose I/O GPIO3; Table 5-3 lists SCI-A receive (SCIA_RX) as one of its muxed functions.
50	GPIO2	bidirectional	General-purpose I/O GPIO2; Table 5-3 lists SCI-A transmit (SCIA_TX) as one of its muxed functions.
51	GPIO1	bidirectional	General-purpose I/O GPIO1; its alternate-function assignments are not in the supplied text.
52	GPIO0	bidirectional	General-purpose I/O GPIO0; its alternate-function assignments are not in the supplied text.
53	GPIO40	bidirectional	General-purpose I/O GPIO40; its alternate-function assignments are not in the supplied text.
54	GPIO23	bidirectional	General-purpose I/O GPIO23; alternate functions include EQEP1_INDEX, SCI-B receive, SPI-B STE, SDFM-1 channel 4 clock, LIN-A receive and EPWM4_B.
55	GPIO41	bidirectional	General-purpose I/O GPIO41; its alternate-function assignments are not in the supplied text.
56	GPIO22	bidirectional	General-purpose I/O GPIO22; alternate functions include EQEP1_STROBE, SCI-B transmit, SPI-B clock, SDFM-1 channel 4 data, LIN-A transmit and EPWM4_A.
57	GPIO7	bidirectional	General-purpose I/O GPIO7; its alternate-function assignments are not in the supplied text.
58	VSS	power_in	Digital ground; all VSS pins must be connected to board ground.
59	VDD	power_in	1.2-V digital logic power pin; recommended supply is 1.14 V to 1.32 V (nominal 1.2 V).
60	VDDIO	power_in	3.3-V digital I/O power pin; the device supply for VDDIO and VDDA is 3.3 V nominal with a 3.63 V maximum.
61	GPIO5	bidirectional	General-purpose I/O GPIO5; its alternate-function assignments are not in the supplied text.
62	GPIO9	bidirectional	General-purpose I/O GPIO9; alternate functions include EPWM5_B, SCI-B transmit, OUTPUTXBAR6, EQEP1_INDEX, SCI-A receive, SPI-A clock and FSITX-A data.
63	GPIO10	bidirectional	General-purpose I/O GPIO10; alternate functions include EPWM6_A, EQEP1_A, SCI-B transmit, SPI-A SOMI, I2C-A data (open-drain) and FSITX-A clock.
64	GPIO6	bidirectional	General-purpose I/O GPIO6; its alternate-function assignments are not in the supplied text.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: F280038CPMRQ1
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: f280038cpmrq1-etched.step / f280038cpmrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); f280038cpmrq1.step / f280038cpmrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (254 pp, sha256 7569bcf0246f0a66, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF