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Contents

README

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DMP6023LSS-13

Diodes Incorporated · MOSFETs · SO-8

DMP6023LSS-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, tied to pins 2 and 3.
2 S passive Source of the P-channel MOSFET, tied to pins 1 and 3.
3 S passive Source of the P-channel MOSFET, tied to pins 1 and 2.
4 G input Gate; threshold VGS(th) is -1 V to -3 V and the absolute maximum VGSS is ±20 V.
5 D passive Drain, tied to pins 6, 7 and 8; VDSS is -60 V and continuous ID is -6.6 A at TA=+25°C.
6 D passive Drain, tied to pins 5, 7 and 8; VDSS is -60 V.
7 D passive Drain, tied to pins 5, 6 and 8; VDSS is -60 V.
8 D passive Drain, tied to pins 5, 6 and 7; VDSS is -60 V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS -60 V 2
Gate-Source Voltage VGSS -20 20 V 2
Continuous Drain Current (TA = +25°C) ID -6.6 A VGS = -10V, TA = +25°C (Note 6) 2
Continuous Drain Current (TA = +70°C) ID -5.3 A VGS = -10V, TA = +70°C (Note 6) 2
Pulsed Drain Current IDM -50 A 10µs pulse, duty cycle = 1% 2
Maximum Continuous Body Diode Forward Current IS -1.8 A Note 6 2
Avalanche Current IAS -35.5 A L = 0.1mH 2
Avalanche Energy EAS 62.9 mJ L = 0.1mH 2
Total Power Dissipation PD 1.2 W Note 5 2
Total Power Dissipation PD 1.6 W Note 6 2
Thermal Resistance, Junction to Ambient RJA 100 °C/W Note 5 2
Thermal Resistance, Junction to Ambient RJA 75 °C/W Note 6 2
Thermal Resistance, Junction to Case RJC 12 Note 6 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Drain-Source Breakdown Voltage BVDSS -60 V VGS = 0V, ID = -250μA 2
Zero Gate Voltage Drain Current IDSS -1 µA TJ = +25°C; VDS = -60V, VGS = 0V 2
Gate-Source Leakage IGSS -100 100 nA VGS = ±20V, VDS = 0V 2
Gate Threshold Voltage VGS(th) -1 -3 V VDS = VGS, ID = -250μA 2
Static Drain-Source On-Resistance RDS(ON) 25 mΩ VGS = -10V, ID = -5A 2
Static Drain-Source On-Resistance RDS(ON) 33 mΩ VGS = -4.5V, ID = -4A 2
Diode Forward Voltage VSD -0.7 -1.2 V VGS = 0V, IS = -1A 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC IF = -5A, di/dt = 100A/μs Body Diode Reverse Recovery Charge Qrr, 14, nC Notes: 5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided. 2
contacts Copper tin  Terminal Connections Indicator: See Diagram Below  Terminals: Finish  Matte Tin Annealed over Copper Leadframe. 1

CAD (KiCad official)

  • Symbol: DMP6023LSS-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmp6023lss-13-etched.step / dmp6023lss-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp6023lss-13.step / dmp6023lss-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 3dc01428a76cd4de, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF