component
TPA6205A1DRBT
Public Made by Adomby adom
Texas Instruments Audio Amplifiers, SON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTPA6205A1DRBT
Texas Instruments · Audio Amplifiers · SON-8-EP(3x3)
TPA6205A1DRBT from Texas Instruments, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SHUTDOWN | input | Active-low shutdown terminal with 1.8-V compatible thresholds, where VIH is 1.15 V and VIL is 0.5 V. |
| 2 | BYPASS | passive | Mid-supply voltage node; adding a bypass capacitor here improves PSRR. |
| 3 | IN+ | input | Positive differential audio input. |
| 4 | IN- | input | Negative differential audio input. |
| 5 | VO+ | output | Positive BTL (bridge-tied load) speaker output. |
| 6 | VDD | power_in | Supply voltage terminal; recommended operating range is 2.5 V to 5.5 V and the absolute maximum is 6 V. |
| 7 | GND | power_in | High-current ground connection. |
| 8 | VO- | output | Negative BTL (bridge-tied load) speaker output. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SON-8-EP(3x3) |
| Category | Amplifiers/Comparators |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | -0.3 | 6 | V | 4 | ||
| Input voltage, INx and SHUTDOWN pins | VI | -0.3 | 0.3 | V | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | ºC | 4 | ||
| Junction temperature | TJ | -40 | 125 | ºC | 4 | ||
| Lead temperature | 260 | ºC | 1.6 mm (1/16 inch) from case for 10 seconds | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VDD | 2.5 | 5.5 | V | 4 | ||
| High-level input voltage SHUTDOWN | VIH | 1.15 | V | 4 | |||
| Low-level input voltage SHUTDOWN | VIL | 0.5 | V | 4 | |||
| Common-mode input voltage | VIC | 0.5 | V | VDD = 2.5 V, 5.5 V, CMRR ≤ –60 dB | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 4 | ||
| Load impedance | ZL | 6.4 | 8 | Ω | 4 | ||
| Power rating (DRB package) | 2.7 | W | TA ≤ 25°C | 6 | |||
| Power rating (DRB package) | 1.7 | W | TA ≤ 70°C | 6 | |||
| Power rating (DRB package) | 1.4 | W | TA ≤ 85°C | 6 | |||
| Output offset voltage | VOO | 9 | mV | VI = 0 V, VDD = 2.5 V to 5.5 V (measured differentially) | 5 | ||
| Power supply rejection ratio | PSRR | -90 | -70 | dB | VDD = 2.5 V to 5.5 V | 5 | |
| Common-mode rejection ratio | CMRR | -70 | -65 | dB | VDD = 3.6 V to 5.5 V, VIC = 0.5 V to VDD – 0.8 | 5 | |
| Common-mode rejection ratio | CMRR | -62 | -55 | dB | VDD = 2.5 V, VIC = 0.5 V to 1.7 V | 5 | |
| Low-level output voltage | VOL | 0.3 | 0.46 | V | RL = 8 Ω, VIN+ = VDD, VIN– = 0 V or VIN+ = 0 V, VIN– = VDD; VDD = 5.5 V | 5 | |
| Low-level output voltage | VOL | 0.19 | 0.26 | V | RL = 8 Ω, VIN+ = VDD, VIN– = 0 V or VIN+ = 0 V, VIN– = VDD; VDD = 2.5 V | 5 | |
| High-level output voltage | VOH | 4.8 | 5.12 | V | RL = 8 Ω, VIN+ = VDD, VIN– = 0 V or VIN+ = 0 V, VIN– = VDD; VDD = 5.5 V | 5 | |
| High-level output voltage | VOH | 2.1 | 2.24 | V | RL = 8 Ω, VIN+ = VDD, VIN– = 0 V or VIN+ = 0 V, VIN– = VDD; VDD = 2.5 V | 5 | |
| High-level input current | IIH | 1.2 | µA | VDD = 5.5 V, VI = 5.8 V | 5 | ||
| Low-level input current | IIL | 1.2 | µA | VDD = 5.5 V, VI = –0.3 V | 5 | ||
| Supply current | IDD | 1.7 | 2 | mA | VDD = 2.5 V to 5.5 V, No load, SHUTDOWN = VIH | 5 | |
| Supply current in shutdown mode | IDD(SD) | 0.01 | 0.9 | µA | SHUTDOWN = VIL, VDD = 2.5 V to 5.5 V, No load | 5 | |
| Common-mode rejection ratio | -85 | dB | VDD = 2.5 V to 5.5 V, f = 20 Hz to 1 kHz, Resistor tolerance = 0.1%, Gain = 4 V/V, VICM = 200 mVPP | 5 | |||
| Common-mode rejection ratio | -74 | dB | VDD = 2.5 V to 5.5 V, f = 20 Hz to 20 kHz, Resistor tolerance = 0.1%, Gain = 4 V/V, VICM = 200 mVPP | 5 | |||
| Output impedance | ZO | 10 | kΩ | Shutdown mode | 5 | ||
| Supply ripple rejection ratio | kSVR | -74 | dB | C(BYPASS) = 0.47 µF, VDD = 2.5 V to 5.5 V, f = 40 Hz to 20 kHz, VRIPPLE = 200 mVPP, inputs AC-grounded, with CI = 2 µF | 5 |
CAD (KiCad official)
- Symbol:
TPA6205A1DRBT - Footprint:
Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm - 3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tpa6205a1drbt-etched.step/tpa6205a1drbt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpa6205a1drbt.step/tpa6205a1drbt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (46 pp, sha256
68a4c8173270bf87, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).