component
MM74HCT08M
Public Made by Adomby adom
onsemi Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMM74HCT08M
onsemi · Gates · SOIC-14
MM74HCT08M from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Gate 1 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 2 | B1 | input | Gate 1 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 3 | Y1 | output | Gate 1 AND output; drives 4.0mA at VCC = 4.5V with VOL max 0.26V at 25°C. |
| 4 | A2 | input | Gate 2 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 5 | B2 | input | Gate 2 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 6 | Y2 | output | Gate 2 AND output; drives 4.0mA at VCC = 4.5V with VOL max 0.26V at 25°C. |
| 7 | GND | power_in | Ground reference (0V) for the device. |
| 8 | Y3 | output | Gate 3 AND output; drives 4.0mA at VCC = 4.5V with VOL max 0.26V at 25°C. |
| 9 | A3 | input | Gate 3 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 10 | B3 | input | Gate 3 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 11 | Y4 | output | Gate 4 AND output; drives 4.0mA at VCC = 4.5V with VOL max 0.26V at 25°C. |
| 12 | A4 | input | Gate 4 input A; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 13 | B4 | input | Gate 4 input B; TTL-compatible threshold with VIH min 2.0V and VIL max 0.8V. |
| 14 | VCC | power_in | Positive supply, recommended 4.5V to 5.5V, absolute maximum -0.5 to +7.0V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Minimum HIGH Level Input Voltage | VIH | 2 | V | VCC = 5V ± 10%, TA = -40°C to 85°C | 4 | ||
| Maximum LOW Level Input Voltage | VIL | 0.8 | V | VCC = 5V ± 10%, TA = -40°C to 85°C | 4 | ||
| Minimum HIGH Level Output Voltage | VOH | 3.84 | 4.2 | V | VIN = VIH or VIL, /IOUT/ = 4.0mA, VCC = 4.5V | 4 | |
| Minimum HIGH Level Output Voltage | VOH | 4.84 | 5.2 | V | VIN = VIH or VIL, /IOUT/ = 4.8mA, VCC = 5.5V | 4 | |
| Maximum LOW Level Voltage | VOL | 0 | 0.1 | V | VIN = VIH, /IOUT/ = 20µA | 4 | |
| Maximum LOW Level Voltage | VOL | 0.2 | 0.33 | V | VIN = VIH, /IOUT/ = 4.0mA, VCC = 4.5V | 4 | |
| Maximum Input Current | IIN | -1 | 1 | µA | VIN = VCC or GND, VIH or VIL | 4 | |
| Maximum Quiescent Supply Current | ICC | 2 | 20 | µA | VIN = VCC or GND, IOUT = 0µA | 4 | |
| Maximum Quiescent Supply Current | ICC | 1.2 | 1.4 | mA | VIN = 2.4V or 0.5V, per input | 4 | |
| Maximum Propagation Delay | tPLH, tPHL | 9 | 15 | ns | VCC = 5.0V, tr = tf = 6ns, CL = 15pF, TA = 25°C | 5 | |
| Maximum Propagation Delay | tPLH, tPHL | 11 | 23 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 50pF, TA = -40°C to 85°C | 5 | |
| Maximum Output Rise and Fall Time | tTHL, tTLH | 7 | 19 | ns | VCC = 5.0V ± 10%, tr = tf = 6ns, CL = 50pF, TA = -40°C to 85°C | 5 | |
| Input Capacitance | CIN | 5 | 10 | pF | VCC = 5.0V ± 10%, CL = 50pF | 5 | |
| Power Dissipation Capacitance | CPD | 38 | pF | Note 4 | 5 | ||
| Supply Voltage | VCC | -0.5 | 7 | V | 3 | ||
| DC Input Voltage | VIN | -1.5 | V | upper limit printed as VCC+1.5V | 3 | ||
| DC Output Voltage | VOUT | -0.5 | V | upper limit printed as VCC+0.5V | 3 | ||
| Clamp Diode Current | IIK, IOK | -20 | 20 | mA | 3 | ||
| DC Output Current, per pin | IOUT | -25 | 25 | mA | 3 | ||
| DC VCC or GND Current, per pin | ICC | -50 | 50 | mA | 3 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Power Dissipation | PD | 500 | mW | S.O. Package only | 3 | ||
| Lead Temperature | TL | 260 | °C | Soldering 10 seconds | 3 | ||
| Supply Voltage | VCC | 4.5 | 5.5 | V | 3 | ||
| DC Input or Output Voltage | VIN, VOUT | 0 | V | upper limit printed as VCC | 3 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | 3 | ||
| Input Rise or Fall Times | tr, tf | 500 | ns | 3 |
CAD (KiCad official)
- Symbol:
MM74HCT08M - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
mm74hct08m-etched.step/mm74hct08m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mm74hct08m.step/mm74hct08m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
3c56cbf1f32bc343, retrieved 2026-10-24, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).