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STM32F401VBH6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-100(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F401VBH6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFBGA-100(7x7)
STM32F401VBH6 from STMicroelectronics, in a UFBGA-100(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| B2 | PE2 | bidirectional | 5 V tolerant I/O (FT), floating input after reset; alternate functions SPI4_SCK, TRACECLK, EVENTOUT. |
| A1 | PE3 | bidirectional | 5 V tolerant I/O (FT), floating input after reset; alternate functions TRACED0, EVENTOUT. |
| B1 | PE4 | bidirectional | 5 V tolerant I/O (FT), floating input after reset; alternate functions SPI4_NSS, TRACED1, EVENTOUT. |
| C2 | PE5 | bidirectional | 5 V tolerant I/O (FT), floating input after reset; alternate functions SPI4_MISO, TIM9_CH1, TRACED2, EVENTOUT. |
| D2 | PE6 | bidirectional | 5 V tolerant I/O (FT), floating input after reset; alternate functions SPI4_MOSI, TIM9_CH2, TRACED3, EVENTOUT. |
| D3 | VSS | power_in | Ground supply pin of the device. |
| C4 | VDD | power_in | Application supply pin for the I/Os and core, 1.7 V to 3.6 V. |
| E2 | VBAT | power_in | Backup supply for the RTC and backup registers, 1 µA typ at 25 °C. |
| C1 | PC13 | bidirectional | 5 V tolerant I/O supplied through the power switch (3 mA sink limit), limited to 2 MHz with 30 pF load and not usable as a current source; alternate functions EVENTOUT, RTC_TAMP1, RTC_OUT, RTC_TS. |
| D1 | PC14-OSC32_IN (PC14) | bidirectional | I/O supplied through the power switch (3 mA sink limit) with the same output limits as PC13; additional function OSC32_IN (32 kHz oscillator input). |
| E1 | PC15-OSC32_OUT (PC15) | bidirectional | I/O supplied through the power switch (3 mA sink limit) with the same output limits as PC13; additional function OSC32_OUT (32 kHz oscillator output). |
| F2 | VSS | power_in | Ground supply pin of the device. |
| G2 | VDD | power_in | Application supply pin for the I/Os and core, 1.7 V to 3.6 V. |
| F1 | PH0-OSC_IN | bidirectional | Not 5 V tolerant when used in oscillator mode; OSC_IN is the 4-26 MHz crystal oscillator input, alternate function EVENTOUT. |
| G1 | PH1-OSC_OUT (PH1) | bidirectional | Not 5 V tolerant when used in oscillator mode; OSC_OUT is the 4-26 MHz crystal oscillator output, alternate function EVENTOUT. |
| H2 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| H1 | PC0 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT, analog input ADC1_IN10. |
| J2 | PC1 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT, analog input ADC1_IN11. |
| J3 | PC2 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_MISO, I2S2ext_SD, EVENTOUT, analog input ADC1_IN12. |
| K2 | PC3 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_MOSI/I2S2_SD, EVENTOUT, analog input ADC1_IN13. |
| J1 | VSSA | power_in | Analog ground pin for the ADC. |
| K1 | VREF- | power_in | Negative reference voltage input for the ADC. |
| L1 | VREF+ | power_in | Positive reference voltage input for the ADC. |
| M1 | VDDA | power_in | Analog supply pin for the ADC and reference. |
| L2 | PA0 | bidirectional | 5 V tolerant I/O; alternate functions USART2_CTS, TIM2_CH1/TIM2_ETR, TIM5_CH1, EVENTOUT, analog ADC1_IN0 and WKUP; if BYPASS_REG is tied to VDD on this UFBGA100 device, PA0 is used as an internal Reset (active low). |
| M2 | PA1 | bidirectional | 5 V tolerant I/O; alternate functions USART2_RTS, TIM2_CH2, TIM5_CH2, EVENTOUT, analog input ADC1_IN1. |
| K3 | PA2 | bidirectional | 5 V tolerant I/O; alternate functions USART2_TX, TIM2_CH3, TIM5_CH3, TIM9_CH1, EVENTOUT, analog input ADC1_IN2. |
| L3 | PA3 | bidirectional | 5 V tolerant I/O; alternate functions USART2_RX, TIM2_CH4, TIM5_CH4, TIM9_CH2, EVENTOUT, analog input ADC1_IN3. |
| E3 | BYPASS_REG | input | 5 V tolerant input that selects the regulator state; tying it to VDD selects Regulator OFF / internal reset ON mode. |
| M3 | PA4 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, EVENTOUT, analog input ADC1_IN4. |
| K4 | PA5 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_SCK, TIM2_CH1/TIM2_ETR, EVENTOUT, analog input ADC1_IN5. |
| L4 | PA6 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_MISO, TIM1_BKIN, TIM3_CH1, EVENTOUT, analog input ADC1_IN6. |
| M4 | PA7 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_MOSI, TIM1_CH1N, TIM3_CH2, EVENTOUT, analog input ADC1_IN7. |
| K5 | PC4 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT, analog input ADC1_IN14. |
| L5 | PC5 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT, analog input ADC1_IN15. |
| M5 | PB0 | bidirectional | 5 V tolerant I/O; alternate functions TIM1_CH2N, TIM3_CH3, EVENTOUT, analog input ADC1_IN8. |
| M6 | PB1 | bidirectional | 5 V tolerant I/O; alternate functions TIM1_CH3N, TIM3_CH4, EVENTOUT, analog input ADC1_IN9. |
| L6 | PB2 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT, additional function BOOT1. |
| M7 | PE7 | bidirectional | 5 V tolerant I/O; alternate functions TIM1_ETR, EVENTOUT. |
| L7 | PE8 | bidirectional | 5 V tolerant I/O; alternate functions TIM1_CH1N, EVENTOUT. |
| M8 | PE9 | bidirectional | 5 V tolerant I/O; alternate functions TIM1_CH1, EVENTOUT. |
| L8 | PE10 | bidirectional | 5 V tolerant I/O; alternate functions TIM1_CH2N, EVENTOUT. |
| M9 | PE11 | bidirectional | 5 V tolerant I/O; alternate functions SPI4_NSS, TIM1_CH2, EVENTOUT. |
| L9 | PE12 | bidirectional | 5 V tolerant I/O; alternate functions SPI4_SCK, TIM1_CH3N, EVENTOUT. |
| M10 | PE13 | bidirectional | 5 V tolerant I/O; alternate functions SPI4_MISO, TIM1_CH3, EVENTOUT. |
| M11 | PE14 | bidirectional | 5 V tolerant I/O; alternate functions SPI4_MOSI, TIM1_CH4, EVENTOUT. |
| M12 | PE15 | bidirectional | 5 V tolerant I/O; alternate functions TIM1_BKIN, EVENTOUT. |
| L10 | PB10 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_SCK/I2S2_CK, I2C2_SCL, TIM2_CH3, EVENTOUT. |
| K9 | PB11 | bidirectional | 5 V tolerant I/O; alternate functions TIM2_CH4, I2C2_SDA, EVENTOUT. |
| L11 | VCAP_1 | power_in | Connection for the external capacitor of the internal voltage regulator (VCAP_1/VCAP_2). |
| F12 | VSS | power_in | Ground supply pin of the device. |
| G12 | VDD | power_in | Application supply pin for the I/Os and core, 1.7 V to 3.6 V. |
| L12 | PB12 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_NSS/I2S2_WS, I2C2_SMBA, TIM1_BKIN, EVENTOUT. |
| K12 | PB13 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_SCK/I2S2_CK, TIM1_CH1N, EVENTOUT. |
| K11 | PB14 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_MISO, I2S2ext_SD, TIM1_CH2N, EVENTOUT. |
| K10 | PB15 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_MOSI/I2S2_SD, TIM1_CH3N, EVENTOUT, additional function RTC_REFIN. |
| K8 | PD9 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT. |
| J12 | PD10 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT. |
| J11 | PD11 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT. |
| J10 | PD12 | bidirectional | 5 V tolerant I/O; alternate functions TIM4_CH1, EVENTOUT. |
| H12 | PD13 | bidirectional | 5 V tolerant I/O; alternate functions TIM4_CH2, EVENTOUT. |
| H11 | PD14 | bidirectional | 5 V tolerant I/O; alternate functions TIM4_CH3, EVENTOUT. |
| H10 | PD15 | bidirectional | 5 V tolerant I/O; alternate functions TIM4_CH4, EVENTOUT. |
| E12 | PC6 | bidirectional | 5 V tolerant I/O; alternate functions I2S2_MCK, USART6_TX, TIM3_CH1, SDIO_D6, EVENTOUT. |
| E11 | PC7 | bidirectional | 5 V tolerant I/O; alternate functions I2S3_MCK, USART6_RX, TIM3_CH2, SDIO_D7, EVENTOUT. |
| E10 | PC8 | bidirectional | 5 V tolerant I/O; alternate functions USART6_CK, TIM3_CH3, SDIO_D0, EVENTOUT. |
| D12 | PC9 | bidirectional | 5 V tolerant I/O; alternate functions I2S_CKIN, I2C3_SDA, TIM3_CH4, SDIO_D1, MCO_2, EVENTOUT. |
| D11 | PA8 | bidirectional | 5 V tolerant I/O; alternate functions I2C3_SCL, USART1_CK, TIM1_CH1, OTG_FS_SOF, MCO_1, EVENTOUT. |
| D10 | PA9 | bidirectional | 5 V tolerant I/O; alternate functions I2C3_SMBA, USART1_TX, TIM1_CH2, EVENTOUT, additional function OTG_FS_VBUS. |
| C12 | PA10 | bidirectional | 5 V tolerant I/O; alternate functions USART1_RX, TIM1_CH3, OTG_FS_ID, EVENTOUT. |
| B12 | PA11 | bidirectional | 5 V tolerant I/O; alternate functions USART1_CTS, USART6_TX, TIM1_CH4, OTG_FS_DM, EVENTOUT. |
| A12 | PA12 | bidirectional | 5 V tolerant I/O; alternate functions USART1_RTS, USART6_RX, TIM1_ETR, OTG_FS_DP, EVENTOUT. |
| A11 | PA13 (JTMS-SWDIO) | bidirectional | 5 V tolerant I/O; alternate functions JTMS-SWDIO, EVENTOUT. |
| C11 | VCAP_2 | power_in | Connection for the external capacitor of the internal voltage regulator (VCAP_1/VCAP_2). |
| F11 | VSS | power_in | Ground supply pin of the device. |
| G11 | VDD | power_in | Application supply pin for the I/Os and core, 1.7 V to 3.6 V. |
| A10 | PA14 (JTCK-SWCLK) | bidirectional | 5 V tolerant I/O; alternate functions JTCK-SWCLK, EVENTOUT. |
| A9 | PA15 (JTDI) | bidirectional | 5 V tolerant I/O; alternate functions JTDI, SPI1_NSS, SPI3_NSS/I2S3_WS, TIM2_CH1/TIM2_ETR, EVENTOUT. |
| B11 | PC10 | bidirectional | 5 V tolerant I/O; alternate functions SPI3_SCK/I2S3_CK, SDIO_D2, EVENTOUT. |
| C10 | PC11 | bidirectional | 5 V tolerant I/O; alternate functions I2S3ext_SD, SPI3_MISO, SDIO_D3, EVENTOUT. |
| B10 | PC12 | bidirectional | 5 V tolerant I/O; alternate functions SPI3_MOSI/I2S3_SD, SDIO_CK, EVENTOUT. |
| C9 | PD0 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT. |
| B9 | PD1 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT. |
| C8 | PD2 | bidirectional | 5 V tolerant I/O; alternate functions TIM3_ETR, SDIO_CMD, EVENTOUT. |
| B8 | PD3 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_SCK/I2S2_CK, USART2_CTS, EVENTOUT. |
| B7 | PD4 | bidirectional | 5 V tolerant I/O; alternate functions USART2_RTS, EVENTOUT. |
| A6 | PD5 | bidirectional | 5 V tolerant I/O; alternate functions USART2_TX, EVENTOUT. |
| B6 | PD6 | bidirectional | 5 V tolerant I/O; alternate functions SPI3_MOSI/I2S3_SD, USART2_RX, EVENTOUT. |
| A5 | PD7 | bidirectional | 5 V tolerant I/O; alternate functions USART2_CK, EVENTOUT. |
| A8 | PB3 (JTDO-SWO) | bidirectional | 5 V tolerant I/O; alternate functions JTDO-SWO, SPI1_SCK, SPI3_SCK/I2S3_CK, I2C2_SDA, TIM2_CH2, EVENTOUT. |
| A7 | PB4 (NJTRST) | bidirectional | 5 V tolerant I/O; alternate functions NJTRST, SPI1_MISO, SPI3_MISO, I2S3ext_SD, I2C3_SDA, TIM3_CH1, EVENTOUT. |
| C5 | PB5 | bidirectional | 5 V tolerant I/O; alternate functions SPI1_MOSI, SPI3_MOSI/I2S3_SD, I2C1_SMBA, TIM3_CH2, EVENTOUT. |
| B5 | PB6 | bidirectional | 5 V tolerant I/O; alternate functions I2C1_SCL, USART1_TX, TIM4_CH1, EVENTOUT. |
| B4 | PB7 | bidirectional | 5 V tolerant I/O; alternate functions I2C1_SDA, USART1_RX, TIM4_CH2, EVENTOUT. |
| A4 | BOOT0 | input | Dedicated BOOT0 boot-mode input pin (input-only); alternate function VPP. |
| A3 | PB8 | bidirectional | 5 V tolerant I/O; alternate functions I2C1_SCL, TIM4_CH3, TIM10_CH1, SDIO_D4, EVENTOUT. |
| B3 | PB9 | bidirectional | 5 V tolerant I/O; alternate functions SPI2_NSS/I2S2_WS, I2C1_SDA, TIM4_CH4, TIM11_CH1, SDIO_D5, EVENTOUT. |
| C3 | PE0 | bidirectional | 5 V tolerant I/O; alternate functions TIM4_ETR, EVENTOUT. |
| A2 | PE1 | bidirectional | 5 V tolerant I/O; alternate function EVENTOUT. |
| H3 | PDR_ON | input | 5 V tolerant input (FT) used for PDR_ON control when the internal reset is OFF. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFBGA-100(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
STM32F401VBH6 - Footprint:
Package_BGA:UFBGA-100_7x7mm_Layout12x12_P0.5mm - 3D model: UFBGA-100(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32f401vbh6-etched.step/stm32f401vbh6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f401vbh6.step/stm32f401vbh6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (139 pp, sha256
c38f92aa9d66e8cb, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).