component
ADS112U04IPWR
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADS112U04IPWR
Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-16
ADS112U04IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GPIO1 | bidirectional | General-purpose input/output 1; input voltage is limited to DGND to DVDD. |
| 2 | GPIO0 | bidirectional | General-purpose input/output 0; input voltage is limited to DGND to DVDD. |
| 3 | RESET | input | Reset input, active low; input voltage is limited to DGND to DVDD. |
| 4 | DGND | power_in | Digital ground; the DVDD to DGND digital supply range is 2.3 V to 5.5 V. |
| 5 | AVSS | power_in | Negative analog power supply; in unipolar operation AVSS to DGND is limited to -0.1 V to 0.1 V. |
| 6 | AIN3 | input | Analog input 3; with the PGA disabled, the absolute input voltage is limited to AVSS - 0.1 V to AVDD + 0.1 V. |
| 7 | AIN2 | input | Analog input 2; with the PGA disabled, the absolute input voltage is limited to AVSS - 0.1 V to AVDD + 0.1 V. |
| 8 | REFN | input | Negative reference input; V(REFN) must stay between AVSS - 0.1 V and V(REFP) - 0.75 V. |
| 9 | REFP | input | Positive reference input; V(REFP) must stay between V(REFN) + 0.75 V and AVDD + 0.1 V. |
| 10 | AIN1 | input | Analog input 1; with the PGA disabled, the absolute input voltage is limited to AVSS - 0.1 V to AVDD + 0.1 V. |
| 11 | AIN0 | input | Analog input 0; with the PGA disabled, the absolute input voltage is limited to AVSS - 0.1 V to AVDD + 0.1 V. |
| 12 | AVDD | power_in | Positive analog power supply, 2.3 V to 5.5 V above AVSS in unipolar operation; connect a 100-nF (or larger) capacitor to AVSS. |
| 13 | DVDD | power_in | Positive digital power supply, 2.3 V to 5.5 V above DGND; connect a 100-nF (or larger) capacitor to DGND. |
| 14 | GPIO2/DRDY | bidirectional | General-purpose input/output 2 or data ready; active low. |
| 15 | TX | output | Serial data output of the 2-wire UART interface. |
| 16 | RX | input | Serial data input of the 2-wire UART interface; input voltage is limited to DGND to DVDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
ADS112U04IPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ads112u04ipwr-etched.step/ads112u04ipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads112u04ipwr.step/ads112u04ipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (77 pp, sha256
6f8d0ff90a8f4ca9, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).