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Contents

README

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PJ75BL50SC

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

PJ75BL50SC from PJSEMI, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin for the regulator, to which the input and output capacitors are connected.
2 VOUT power_out Regulated output; the datasheet recommends a 1μF to 10μF output capacitor with ESR from 5mΩ to 100mΩ, placed as close as possible to OUT and GND.
3 VIN power_in Power input with a supply range of 3V to 36V (absolute maximum -0.3V to +40V), decoupled by a 1μF to 10μF ceramic capacitor to GND.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-23-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 3 36 V 6
Output Voltage Accuracy ΔVOUT -2 2 % IOUT=1mA 6
Quiescent Current IQ 2.5 4 μA IOUT=0mA 6
Dropout Voltage VDROP 990 mV VOUT=5.0V IOUT=150mA 6
Dropout Voltage VDROP 600 mV VOUT=5.0V IOUT=100mA 6
Line Regulation ΔVLINE 0.2 %/V VIN=VOUT+2V to 30V IOUT=10mA 6
Load Regulation ΔVLOAD 5 20 mV VIN=VOUT+2V, 1mA<IOUT<150mA 6
Maximum Output Current IOUT(Max) 200 mA 6
Short Current Protection IShort 100 mA OUT Short to GND 6
Output Noise eN 120 μVRMS 10Hz to 100KHz IOUT=30mA 6
Power Supply Rejection Ratio PSRR 68 dB VIN=12V, IOUT=1mA, f=1KHz 6
Supply Voltage -0.3 40 V 5
Power Dissipation SOT-23-3 400 mW 5
Thermal Resistance, Junction-to-Ambient SOT-23-3 380 °C/W 5
Operating Junction Temperature -40 125 °C 5
Storage Temperature Range -65 150 °C 5
Lead Temperature (Soldering, 10 sec) 300 °C 10 sec 5
ESD Voltage -4000 4000 V HBM 5
Supply Voltage 3 36 V 5
Maximum Output Current 200 mA 5
Operating Ambient Temperature -40 125 °C 5

CAD (KiCad official)

  • Symbol: PJ75BL50SC
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: pj75bl50sc-etched.step / pj75bl50sc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pj75bl50sc.step / pj75bl50sc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (20 pp, sha256 a077a4a194a866ac, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF