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LTC8844XT14
Public Made by Adomby adom
Linearin Precision OpAmps, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLTC8844XT14
Linearin · Precision OpAmps · TSSOP-14
LTC8844XT14 from Linearin, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Amplifier A output. |
| 2 | -INA | input | Amplifier A inverting input, voltage range from (VS- - 0.1V) to (VS+ + 0.1V). |
| 3 | +INA | input | Amplifier A non-inverting input, same voltage range as -IN (VS- - 0.1V to VS+ + 0.1V). |
| 4 | +VS | power_in | Positive power supply, 2.0 V to 5.5 V over -40 to +125 C (1.8 V to 5.5 V at 0 to 70 C). |
| 5 | +INB | input | Amplifier B non-inverting input, voltage range from (VS- - 0.1V) to (VS+ + 0.1V). |
| 6 | -INB | input | Amplifier B inverting input, voltage range from (VS- - 0.1V) to (VS+ + 0.1V). |
| 7 | OUTB | output | Amplifier B output. |
| 8 | OUTC | output | Amplifier C output. |
| 9 | -INC | input | Amplifier C inverting input, voltage range from (VS- - 0.1V) to (VS+ + 0.1V). |
| 10 | +INC | input | Amplifier C non-inverting input, voltage range from (VS- - 0.1V) to (VS+ + 0.1V). |
| 11 | -VS | power_in | Negative power supply (ground in single-supply use). |
| 12 | +IND | input | Amplifier D non-inverting input, voltage range from (VS- - 0.1V) to (VS+ + 0.1V). |
| 13 | -IND | input | Amplifier D inverting input, voltage range from (VS- - 0.1V) to (VS+ + 0.1V). |
| 14 | OUTD | output | Amplifier D output. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Linearin |
| Package | TSSOP-14 |
| Category | Amplifiers |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -500 | 120 | 500 | μV | 3 | |
| Offset voltage drift | VOS TC | 0.8 | 2.3 | μV/℃ | TA = −40 to +125 ℃ | 3 | |
| Power supply rejection ratio | PSRR | 80 | 112 | dB | VS = 2.0 to 5.5 V, VCM < VS+ − 2V | 3 | |
| Power supply rejection ratio | PSRR | 75 | dB | TA = −40 to +125 ℃ | 3 | ||
| Input bias current at TA=+85℃ | IB | 150 | pA | TA = +85 ℃ | 3 | ||
| Input bias current at TA=+125℃ | IB | 500 | pA | TA = +125 ℃ | 3 | ||
| Input offset current | IOS | 1 | pA | 3 | |||
| Input voltage noise (peak-to-peak) | Vn | 5.6 | μVP-P | f = 0.1 to 10 Hz | 3 | ||
| Input voltage noise density | en | 22 | nV/√Hz | f = 10 kHz | 3 | ||
| Input voltage noise density | en | 25 | nV/√Hz | f = 1 kHz | 3 | ||
| Input current noise density | In | 3 | fA/√Hz | f = 1 kHz | 3 | ||
| Common-mode voltage range (offset from VS− and VS+ rails) | VCM | -0.1 | 0.1 | V | 3 | ||
| Common-mode rejection ratio | CMRR | 80 | 96 | dB | VS = 5.5 V, VCM = −0.1 to 5.6 V | 3 | |
| Common-mode rejection ratio | CMRR | 75 | dB | VCM = 0 to 5.3 V, TA = −40 to +125 ℃ | 3 | ||
| Common-mode rejection ratio | CMRR | 78 | 90 | dB | VS = 2.0 V, VCM = −0.1 to 2.1 V | 3 | |
| Common-mode rejection ratio | CMRR | 72 | dB | VCM = 0 to 1.8 V, TA = −40 to +125 ℃ | 3 | ||
| Input capacitance differential | CIN | 2 | pF | Differential | 3 | ||
| Input capacitance common mode | CIN | 3.5 | pF | Common mode | 3 | ||
| Open-loop voltage gain | AVOL | 90 | 105 | dB | RL = 10 kΩ, VO = 0.05 to 3.5 V | 3 | |
| Open-loop voltage gain | AVOL | 85 | dB | TA = −40 to +125 ℃ | 3 | ||
| Open-loop voltage gain | AVOL | 85 | 100 | dB | RL = 600 Ω, VO = 0.15 to 3.5 V | 3 | |
| Open-loop voltage gain | AVOL | 80 | dB | TA = −40 to +125 ℃ | 3 | ||
| Gain bandwidth product | GBW | 1.5 | MHz | 3 | |||
| Slew rate | SR | 1.2 | V/μs | G = +1, CL = 100 pF, VO = 1.5 to 3.5 V | 3 | ||
| Total harmonic distortion + noise | THD+N | 0.002 | % | G = +1, f = 1 kHz, VO = 1 VRMS | 3 | ||
| Settling time to 0.1% | tS | 1.2 | μs | To 0.1%, G = +1, 1V step | 3 | ||
| Settling time to 0.01% | tS | 1.5 | μs | To 0.01%, G = +1, 1V step | 3 | ||
| Overload recovery time | tOR | 2 | μs | To 0.1%, VIN * Gain > VS | 3 | ||
| High output voltage swing (headroom below VS+) | VOH | 11 | 19 | mV | RL = 10 kΩ | 4 | |
| High output voltage swing (headroom below VS+) | VOH | 200 | 275 | mV | RL = 600 Ω | 4 | |
| Low output voltage swing (headroom above VS−) | VOL | 8 | 14 | mV | RL = 10 kΩ | 4 | |
| Low output voltage swing (headroom above VS−) | VOL | 135 | 185 | mV | RL = 600 Ω | 4 | |
| Short-circuit current, source | ISC | 45 | mA | Source current through 10Ω | 4 | ||
| Short-circuit current, sink | ISC | 55 | mA | Sink current through 10Ω | 4 | ||
| Operating supply voltage | VS | 1.8 | 5.5 | V | TA = 0 to +70 ℃ | 4 | |
| Operating supply voltage | VS | 2 | 5.5 | V | TA = −40 to +125 ℃ | 4 | |
| Quiescent current (per amplifier) | IQ | 85 | 135 | μA | Per amplifier | 4 | |
| Quiescent current (per amplifier) | IQ | 170 | μA | TA = −40 to +125 ℃ | 4 | ||
| Operating temperature range | TA | -40 | 125 | ℃ | 4 | ||
| Package thermal resistance, junction to ambient | θJA | 112 | ℃/W | TSSOP-14L | 4 | ||
| Supply voltage, VS+ to VS− | VS+ − VS− | 10 | V | 2 | |||
| Signal input terminal voltage (offset from VS− and VS+ rails) | VIN | -0.5 | 0.5 | V | 2 | ||
| Signal input terminal current | IIN | -10 | 10 | mA | 2 | ||
| Storage temperature range | Tstg | -65 | 150 | ℃ | 2 | ||
| Junction temperature | TJ | 150 | ℃ | 2 | |||
| Lead temperature range (soldering) | 260 | ℃ | Soldering 10 sec | 2 | |||
| Electrostatic discharge, human body model | HBM | -5000 | 5000 | V | MIL-STD-883J / Method 3015.9 | 2 | |
| Electrostatic discharge, charged device model | CDM | -2000 | 2000 | V | ESDA/JEDEC JS-002-2014 | 2 | |
| Electrostatic discharge, machine model | MM | -250 | 250 | V | JESD22-A115C | 2 |
CAD (KiCad official)
- Symbol:
LTC8844XT14 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
ltc8844xt14-etched.step/ltc8844xt14-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ltc8844xt14.step/ltc8844xt14.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Linearin datasheet (20 pp, sha256
cf701ee12d33ced3, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).