component
TESDS5V0A
Public Made by Adomby adom
Leiditech ESD And Surge Protection (TVS/ESD), SOT-26. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTESDS5V0A
Leiditech · ESD And Surge Protection (TVS/ESD) · SOT-26
TESDS5V0A from Leiditech, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Data line 1 | passive | Protected data line that is clamped to the reference pins when its voltage exceeds the reference plus one diode drop; the device is rated for ±20kV air and contact ESD per IEC 61000-4-2. |
| 2 | REF1 (negative reference) | power_in | Negative reference that should be connected directly to a ground plane with the shortest possible path to minimize parasitic inductance. |
| 3 | Data line 2 | passive | Protected data line that is clamped to the reference pins when its voltage exceeds the reference plus one diode drop; the device is rated for ±20kV air and contact ESD per IEC 61000-4-2. |
| 4 | Data line 3 | passive | Protected data line that is clamped to the reference pins when its voltage exceeds the reference plus one diode drop; the device is rated for ±20kV air and contact ESD per IEC 61000-4-2. |
| 5 | REF2 (positive reference) | passive | Positive reference that may be tied directly to VCC, tied to VCC through a recommended 100kΩ series resistor, or left unconnected when the internal TVS is used as the reference, with the datasheet warning that connecting it to VCC in the DVI application may damage the chip. |
| 6 | Data line 4 | passive | Protected data line that is clamped to the reference pins when its voltage exceeds the reference plus one diode drop; the device is rated for ±20kV air and contact ESD per IEC 61000-4-2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOT-26 |
| Category | Circuit Protection |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse Working Voltage | VRWM | 5 | V | 2 | |||
| Breakdown Voltage | VBR | 6 | V | IT = 1mA | 2 | ||
| Reverse Leakage Current | IR | 1 | µA | VRWM = 5V | 2 | ||
| Clamping Voltage | VC | 15 | V | IPP = 1A (8 x 20 s pulse) | 2 | ||
| Clamping Voltage | VC | 28 | V | IPP = 5A (8 x 20 s pulse) | 2 | ||
| Peak Pulse Power (8/20µs) | Ppp | 350 | W | 1 | |||
| ESD per IEC 61000-4-2 (Air) | VESD | -20 | 20 | Kv | 1 | ||
| ESD per IEC 61000-4-2 (Contact) | VESD | -20 | 20 | Kv | 1 | ||
| Operating Temperature Range | TJ | -55 | 125 | ℃ | 1 | ||
| Storage Temperature Range | TSTJ | -55 | 150 | ℃ | 1 | ||
| Junction Capacitance | CJ | 0.5 | pF | V = 0V, f = 1MHz | 2 |
CAD (KiCad official)
- Symbol:
TESDS5V0A - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-26 (KiCad packages3D, STEP)
- 3D model files:
tesds5v0a-etched.step/tesds5v0a-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tesds5v0a.step/tesds5v0a.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Leiditech datasheet (7 pp, sha256
586a7e11f19fb7d5, retrieved 2026-10-20, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).