ISL59110IEZ-T7 from RENESAS, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN+	input	Non-inverting signal input, which the datasheet states can reach 0.15V below the negative rail (VS-) and feeds an internal sync tip clamp.
2	GND	power_in	Ground reference for the single supply; the absolute maximum supply voltage from VS+ to GND is 3.6V.
3	SAG	passive	Connects to the internal SAG network that reduces the size of the AC coupling capacitor; with SAG open the DC gain to VOUT is 2.25 V/V.
4	OUT	output	Rail-to-rail output; the datasheet has no internal short-circuit protection and recommends the output current never exceed ±40mA for maximum reliability.
5	EN	input	Enable pin where high enables the part and low shuts it down, with VIL 0.8V max and VIH 1.6V min at VDD = 2.7V to 3.3V, and shutdown current below 3µA.
6	VS+	power_in	Positive supply pin, specified for 2.5V to 3.6V operation and to be bypassed to GND with a 4.7µF tantalum in parallel with a 0.1µF ceramic capacitor.

Key specifications

Parameter	Value
Manufacturer	RENESAS
Package	SC-70-6
Category	Amplifiers
Pins	6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Voltage Range	VCC	2.5		3.6	V		2
Quiescent Supply Current	IDD(ON)		2	2.75	mA	VIN = 500mV, EN = VDD, no load	2
Shutdown Supply Current	IDD(OFF)			3	µA	EN = 0V	2
Output Level Shift Voltage	VOLS	60	130	200	mV	VIN = 0V, no load	2
Input Voltage Clamp	VCLAMP	-40	-15	10	mV	IIN = -1mA	2
Clamp Charge Current	ICLAMP_CHG	-6		-3	mA	VIN = VCLAMP - 100mV	2
Clamp Discharge Current	ICLAMP_DCHG	2.5	5	7.5	µA	VIN = 500mV	2
Input Resistance	RIN	0.5	3		M	0.5V < VIN < 1.0V	2
Voltage Gain	AV	1.95	2	2.04	V/V	RL = 150	2
DC Power Supply Rejection	PSRR	43	63		dB	VDD = 2.7V to 3.3V	2
Output Voltage High Swing	VOH	2.85	3.2		V	VIN = 2V, RL = 150 to GND	2
Output Short-Circuit Current (to GND)	ISC	-94		-65	mA	VIN = 2V, to GND through 10	2
Output Short-Circuit Current (to VDD)	ISC	65		115	mA	VIN = 100mV, out short to VDD through 10	2
Enable Current	IENABLE	-3	0	3	µA	±3.3V, enable pin = 0V	2
Disable Threshold	VIL			0.8	V	VDD = 2.7V to 3.3V	2
Enable Threshold	VIH	1.6			V	VDD = 2.7V to 3.3V	2
Shutdown Output Impedance (DC)	ROUT	3.6	4.5	5.9	k	EN = 0V DC	2
Enable Time	tON			200	ns	VIN = 500mV, VOUT to 1%	3
Disable Time	tOFF			14	ns	VIN = 500mV, VOUT to 1%	3
Positive Slew Rate	+SR	20	41	70	V/µs	10% to 90%, VIN = 1V step	3
Negative Slew Rate	-SR	-70	-30	-20	V/µs	90% to 10%, VIN = 1V step	3
Supply Voltage from VS+ to GND	VS+			3.6	V		2
Continuous Output Current				40	mA		2
Storage Temperature		-65		125	°C		2
Operating Junction Temperature				125	°C		2
Ambient Operating Temperature		-40		85	°C		2
Small Signal Bandwidth ±0.1dB	BW		4		MHz	RL = 150, CL = 5pF	2
-3dB Bandwidth	BW		8		MHz	RL = 150, CL = 5pF	2
SAG Correction DC Gain to VOUT	ASAG		2.25		V/V	SAG open	2
Normalized Stopband Gain			-24.2		dB	f = 27MHz	2
Differential Gain (DC coupled)	dG		0.1		%	NTSC and PAL DC coupled	2
Differential Gain (AC coupled)	dG		0.84		%	NTSC and PAL AC coupled	2
Differential Phase (DC coupled)	dP		0.05		°	NTSC and PAL DC coupled	2
Differential Phase (AC coupled)	dP		0.62		°	NTSC and PAL AC coupled	2
Group Delay Variation	D/DT		5.4		ns	f = 100kHz, 5MHz	2
Signal To Noise Ratio	SNR		65		dB	100% white signal	3
Fall Time	tF		25		ns	2.5VSTEP, 80% - 20%	3
Rise Time	tR		22		ns	2.5VSTEP, 20% - 80%	3
Shutdown Output Impedance (f = 4.5MHz)	ROUT		3.4		k	EN = 0V, f = 4.5MHz	2
Thermal resistance junction-to-ambient, low effective thermal conductivity board	JA		220		°C/W	JEDEC JESD51-3 low effective thermal conductivity test board	7
Thermal resistance junction-to-ambient, high effective thermal conductivity board	JA		200		°C/W	JEDEC JESD51-7 high effective thermal conductivity test board	7

CAD (KiCad official)

Symbol: ISL59110IEZ-T7
Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
3D model: SC-70-6 (KiCad packages3D, STEP)
3D model files: isl59110iez-t7-etched.step / isl59110iez-t7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); isl59110iez-t7.step / isl59110iez-t7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: RENESAS datasheet (10 pp, sha256 f8c8af8be48dc9c5, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ISL59110IEZ-T7

Verified ISL59110IEZ-T7

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3D Model

Symbol & Footprint

Schematic Symbol

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Datasheet

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