component

H24C02S

Public Made by Adom

by adom

HXY MOSFET EEPROM, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

markdown

H24C02S

HXY MOSFET · EEPROM · SOT-23-5L

H24C02S from HXY MOSFET, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCL input Serial clock input; the rising edge latches data into the EEPROM and the falling edge clocks data out.
2 GND power_in Ground.
3 SDA bidirectional Serial data input / open-drain output; bi-directional line that can be wired-OR with other open-drain devices and is typically pulled high by an external resistor.
4 VCC power_in Power supply, 1.8V to 5.5V, with a decoupling capacitor of at least 10nF recommended.
5 WP input Write protect input; programming is disabled when connected to VIH or VCC and allowed when left unconnected or at VIL, with read operations unaffected.

Key specifications

Parameter Value
Manufacturer HXY MOSFET
Package SOT-23-5L
Category Memory
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply VCC VCC 1.8 5.5 V 11
Supply read current ICC1 0.5 1 mA VCC @ 5.0V, SCL = 400 kHz 11
Supply write current ICC2 2 3 mA VCC @ 5.0V, SCL = 400 kHz 11
Supply current ISB1 1 µA VCC @ 1.8V, VIN = VCC or VSS 11
Input leakage current IIL 3 µA VIN = VCC or VSS 11
Output leakage current ILO 3 µA VIN = VCC or VSS 11
Input low level VIL -0.6 V 11
Output low level VOL1 0.2 V VCC @ 1.8V, IOL = 0.15 mA 11
Output low level VOL2 0.4 V VCC @ 3.0V, IOL = 2.1 mA 11
Clock frequency, SCL fSCL 400 kHz VCC 1.8V 10
Clock frequency, SCL fSCL 1000 kHz VCC 2.5V-5.5V 10
Clock pulse width low tLOW 1.3 µs VCC 1.8V 10
Clock pulse width low tLOW 0.4 µs VCC 2.5V-5.5V 10
Clock pulse width high tHIGH 0.6 µs VCC 1.8V 10
Clock pulse width high tHIGH 0.4 µs VCC 2.5V-5.5V 10
Clock low to data out valid tAA 0.2 0.9 µs VCC 1.8V 10
Clock low to data out valid tAA 0.2 0.55 µs VCC 2.5V-5.5V 10
Time the bus must be free before a new transmission can start tBUF 1.3 µs VCC 1.8V 10
Time the bus must be free before a new transmission can start tBUF 0.5 µs VCC 2.5V-5.5V 10
START hold time tHD.STA 0.6 µs VCC 1.8V 10
START hold time tHD.STA 0.25 µs VCC 2.5V-5.5V 10
START set-up time tSU.STA 0.6 µs VCC 1.8V 10
START set-up time tSU.STA 0.25 µs VCC 2.5V-5.5V 10
Data in hold time tHD.DAT 0 µs VCC 1.8V 10
Data in set-up time tSU.DAT 100 ns VCC 1.8V 10
Input rise time tR 0.3 µs VCC 1.8V 10
Input fall time tF 300 ns VCC 1.8V 10
Input fall time tF 100 ns VCC 2.5V-5.5V 10
STOP set-up time tSU.STO 0.6 µs VCC 1.8V 10
STOP set-up time tSU.STO 0.25 µs VCC 2.5V-5.5V 10
Data out hold time tDH 50 ns VCC 1.8V 10
Vcc slew rate at power up tPWR,R 0.1 50 V/ms VCC 1.8V 10
Time required after VCC is stable before the device can accept commands tPUP 100 µs VCC 1.8V 10
Minimum time at Vcc=0V between power cycles tPOFF 500 ms VCC 1.8V 10
Write cycle time tWR 5 ms VCC 1.8V 10
Industrial operating temperature -40 85 °C 2
Storage temperature -50 125 °C 2
Input voltage on any pin relative to ground -0.3 V relative to ground; upper limit printed as VCC + 0.3V 2
ESD protection on all pins 2000 V all pins, printed as >2000V 2

CAD (KiCad official)

  • Symbol: H24C02S
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5L (KiCad packages3D, STEP)
  • 3D model files: h24c02s-etched.step / h24c02s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); h24c02s.step / h24c02s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HXY MOSFET datasheet (13 pp, sha256 31fd50ba130cebf9, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF