LTC3225EDDB#TRPBF from Analog Devices, in a DFN-10(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	C+	passive	Flying capacitor positive terminal; a 1μF X5R or X7R ceramic capacitor should be connected from C+ to C-.
2	C-	passive	Flying capacitor negative terminal, connected to C+ through the 1μF X5R or X7R flying capacitor.
3	CX	passive	Midpoint of the two series supercapacitors; forced to track COUT/2 during charging to balance the top and bottom supercapacitors.
4	SHDN	input	Active-low shutdown input; a low puts the part in low current shutdown mode and it must not be left floating.
5	PGOOD	output	Open-drain status output that stays low until VOUT is within 6% (typical) of its final value and pulls low if VOUT falls 7.2% (typical) below regulation; it may be pulled up through an external resistor and is Hi-Z in shutdown.
6	VSEL	input	Output voltage selection input; logic low sets COUT to 4.8V (LTC3225) or 4V (LTC3225-1), logic high sets COUT to 5.3V (LTC3225) or 4.5V (LTC3225-1), and it must not be left floating.
7	PROG	passive	Charge current programming pin; a resistor connected between this pin and GND sets the charge current.
8	GND	power_in	Charge pump ground that must be soldered directly to PCB ground.
9	VIN	power_in	Power supply input for the part, operating from 2.8V to 5.5V, to be bypassed to GND with a low ESR ceramic capacitor of more than 2.2μF.
10	COUT	power_out	Charge pump output connected to the top plate of the top supercapacitor; regulates the final voltage to 4.8V/5.3V (LTC3225) or 4V/4.5V (LTC3225-1).
11	GND	power_in	Exposed pad ground that must be soldered to a low impedance PCB ground for rated thermal performance.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	DFN-10(2x3)
Category	Power Management (PMIC)
Pins	11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Output Charge Current	IOUT	125	150	175	mA	VIN = 3.6V, RPROG = 12k, CTOP = CBOT, VOUT = 4.5V (LTC3225)	3
CLK Frequency	fOSC	0.6	0.9	1.5	MHz		3
Input Supply Undervoltage Lockout High-to-Low Threshold	VIN-UVLO	2.65	2.75	2.85	V	VSEL = VIN	2
Input Supply Undervoltage Lockout High-to-Low Threshold	VIN-UVLO	2.4	2.5	2.6	V	VSEL = 0	2
Input Voltage Range	VIN	3		5.5	V	VSEL = VIN	2
Input Voltage Range	VIN	2.8		5.5	V	VSEL = 0V	2
VCOUT Charge Termination Voltage; Sleep Mode Threshold (Rising Edge)	VCOUT	5.2	5.3	5.4	V	VSEL = VIN	2
VCOUT Charge Termination Voltage; Sleep Mode Threshold (Rising Edge)	VCOUT	4.7	4.8	4.9	V	VSEL = 0V	2
Maximum Voltage Across Each Supercapacitor After Charging	VTOP/BOT			2.75	V	VSEL = VIN	2
Maximum Voltage Across Each Supercapacitor After Charging	VTOP/BOT			2.5	V	VSEL = 0V	2
PGOOD Low Output Voltage	VPGOOD			0.4	V	IPGOOD = -1.6mA	3
PGOOD High Impedance Leakage Current	IPGOOD-LEAK			10	μA	VPGOOD = 5V	3
PGOOD Low-to-High Threshold Relative to Output Voltage Threshold	VPG	92	94	96	%		3
PGOOD Threshold Hysteresis Relative to Output Voltage Threshold	VPG-HYS	0.25	1.2	2.5	%		3
Input High Voltage	VIH	1.3			V		3
Input Low Voltage	VIL			0.4	V		3
Input High Current	IIH	-1		1	μA		3
Input Low Current	IIL	-1		1	μA		3
No Load Operating Current at VIN	IQ-VIN		20	40	μA	IOUT = 0mA	3
Shutdown Current	ISHDN-VIN		0.1	1	μA	SHDN = 0V, VOUT = 0V	3
Input Supply Undervoltage Lockout Hysteresis	VIN-UVLO-HYS		150		mV	VSEL = VIN	2
Input Supply Undervoltage Lockout Hysteresis	VIN-UVLO-HYS		140		mV	VSEL = 0	2
Output Comparator Hysteresis	VCOUT-HYS		100		mV		2
Input Charge Current	IVIN		306		mA	VIN = 3.6V, RPROG = 12k, CTOP = CBOT	3
Input Charge Current	IVIN		55		mA	VIN = 3.6V, RPROG = 60k, CTOP = CBOT	3
Output Charge Current	IOUT		26		mA	VIN = 3.6V, RPROG = 60k, CTOP = CBOT, VOUT = 4.5V (LTC3225)	3
Effective Open-Loop Output Impedance	ROL		8		Ω	VIN = 3.6V, VOUT = 4.5V (LTC3225)	3
VIN, COUT to GND Voltage	VIN	-0.3		6	V		2
SHDN, VSEL Voltage		-0.3			V	VIN + 0.3V maximum	2
IOUT Continuous Current	IOUT			175	mA	Note 2	2
Operating Temperature Range		-40		85	°C	Note 3	2
Storage Temperature Range		-65		125	°C		2
Maximum Junction Temperature	TJMAX			125	°C		2
Thermal Resistance, Junction to Ambient	θJA		76		°C/W		2

CAD (KiCad official)

Symbol: LTC3225EDDB#TRPBF
Footprint: Package_DFN_QFN:DFN-10-1EP_2x3mm_P0.5mm_EP0.64x2.4mm
3D model: DFN-10(2x3) (KiCad packages3D, STEP)
3D model files: ltc3225eddb-trpbf-etched.step / ltc3225eddb-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ltc3225eddb-trpbf.step / ltc3225eddb-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (14 pp, sha256 135ab11eb5629412, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

LTC3225EDDB#TRPBF

Verified LTC3225EDDB#TRPBF

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3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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