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FM24V01A-GTR
Public Made by Adomby adom
Infineon Cypress Semicon FRAM, SOIC-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFM24V01A-GTR
Infineon Cypress Semicon · FRAM · SOIC-8
FM24V01A-GTR from Infineon Cypress Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | WP | input | Write protect input; write-protects entire memory array when tied to VDD, enables all writes when connected to ground; internally pulled down. |
| 2 | SCL | input | Serial clock input for I2C two-wire interface; Schmitt trigger for noise immunity; data clocked out on falling edge and latched on rising edge. |
| 3 | SDA | bidirectional | Serial data address line for I2C two-wire interface; open-drain output with slope-controlled falling edges and Schmitt trigger input; external pull-up resistor required. |
| 4 | VSS | power_in | Ground supply connection; must be connected to system ground. |
| 5 | VDD | power_in | Power supply input; operating range 2.0 V to 3.6 V for industrial temperature -40°C to +85°C. |
| 6 | A2 | input | Device select address input 2; internally pulled down; must match corresponding slave address bits for device selection among up to eight devices on same I2C bus. |
| 7 | A1 | input | Device select address input 1; internally pulled down; must match corresponding slave address bits for device selection among up to eight devices on same I2C bus. |
| 8 | A0 | input | Device select address input 0; internally pulled down; must match corresponding slave address bits for device selection among up to eight devices on same I2C bus. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Cypress Semicon |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VDD | 2 | 3.3 | 3.6 | V | 13 | |
| Operating ambient temperature (industrial range) | TA | -40 | 85 | °C | Industrial range | 13 | |
| Average VDD current | IDD | 175 | µA | fSCL = 100 kHz | 13 | ||
| Average VDD current | IDD | 400 | µA | fSCL = 1 MHz | 13 | ||
| Average VDD current | IDD | 1000 | µA | fSCL = 3.4 MHz | 13 | ||
| VDD standby current | ISB | 90 | 150 | µA | SCL = SDA = VDD; other inputs VSS or VDD; Stop command issued | 13 | |
| Sleep mode current | IZZ | 5 | 8 | µA | SCL = SDA = VDD; other inputs VSS or VDD; Stop command issued | 13 | |
| Input leakage current (except WP and A2-A0) | ILI | -1 | 1 | µA | VSS < VIN < VDD | 13 | |
| Input leakage current (for WP and A2-A0) | ILI | -1 | 100 | µA | VSS < VIN < VDD | 13 | |
| Output leakage current | ILO | -1 | 1 | µA | VSS < VOUT < VDD | 13 | |
| Input LOW voltage | VIL | -0.3 | V | max 0.3 × VDD | 13 | ||
| Output LOW voltage | VOL | 0.4 | V | IOL = 3 mA | 13 | ||
| Output LOW voltage | VOL | 0.6 | V | IOL = 6 mA | 13 | ||
| Input resistance (WP, A2-A0) | Rin | 50 | kΩ | For VIN = VIL(Max) | 13 | ||
| Input resistance (WP, A2-A0) | Rin | 1 | MΩ | For VIN = VIH(Min) | 14 | ||
| Data retention | TDR | 10 | Years | TA = 85 °C | 14 | ||
| Data retention | TDR | 38 | Years | TA = 75 °C | 14 | ||
| Data retention | TDR | 151 | Years | TA = 65 °C | 14 | ||
| Endurance | NVC | 1014 | Cycles | Over operating temperature | 14 | ||
| Input/output pin capacitance (SDA) | CIO | 8 | pF | TA = 25 °C, f = 1 MHz, VDD = VDD(typ) | 14 | ||
| Input pin capacitance | CI | 6 | pF | 14 | |||
| Storage temperature | -65 | 125 | °C | 13 | |||
| Ambient temperature with power applied | -55 | 125 | °C | 13 | |||
| Maximum accumulated storage time at 125 °C ambient | 1000 | h | At 125 °C ambient temperature | 13 | |||
| Maximum accumulated storage time at 85 °C ambient | 10 | years | At 85 °C ambient temperature | 13 | |||
| Supply voltage on VDD relative to VSS | VDD | -1 | 4.5 | V | 13 | ||
| Input voltage | VIN | -1 | 4.5 | V | VIN < VDD + 1.0 V (not for SCL and SDA) | 13 | |
| DC voltage applied to outputs in HI-Z state | -0.5 | V | Max: VDD + 0.5 V | 13 | |||
| Transient voltage on any pin to ground potential | -2 | V | Transient < 20 ns; max VDD + 2.0 V | 13 | |||
| Package power dissipation capability | 1 | W | TA = 25 °C | 13 | |||
| Surface mount lead soldering temperature | 260 | °C | 3 seconds | 13 | |||
| Power-up VDD(min) to first access (START condition) | tPU | 250 | µs | 16 | |||
| Last access (STOP condition) to power-down (VDD(min)) | tPD | 0 | µs | 16 | |||
| VDD power-up ramp rate | tVR | 50 | µs/V | 16 | |||
| VDD power-down ramp rate | tVF | 100 | µs/V | 16 | |||
| Recovery time from sleep mode | tREC | 400 | µs | 16 | |||
| SCL clock frequency | fSCL | 1 | MHz | Fast-mode Plus (Fm+) | 15 | ||
| SCL clock frequency | fSCL | 3.4 | MHz | Hs-mode | 15 | ||
| Start condition setup for repeated Start | tSU;STA | 260 | ns | Fast-mode Plus (Fm+) | 15 | ||
| Start condition setup for repeated Start | tSU;STA | 160 | ns | Hs-mode | 15 | ||
| Start condition hold time | tHD;STA | 260 | ns | Fast-mode Plus (Fm+) | 15 | ||
| Start condition hold time | tHD;STA | 160 | ns | Hs-mode | 15 | ||
| Clock LOW period | tLOW | 500 | ns | Fast-mode Plus (Fm+) | 15 | ||
| Clock LOW period | tLOW | 160 | ns | Hs-mode | 15 | ||
| Clock HIGH period | tHIGH | 260 | ns | Fast-mode Plus (Fm+) | 15 | ||
| Clock HIGH period | tHIGH | 60 | ns | Hs-mode | 15 | ||
| Data in setup | tSU;DAT | 50 | ns | Fast-mode Plus (Fm+) | 15 | ||
| Data in setup | tSU;DAT | 10 | ns | Hs-mode | 15 | ||
| SCL LOW to SDA data out valid | tAA | 450 | ns | Fast-mode Plus (Fm+) | 15 | ||
| SCL LOW to SDA data out valid | tAA | 130 | ns | Hs-mode | 15 | ||
| ACK output valid time | tVD;ACK | 450 | ns | Fast-mode Plus (Fm+) | 15 | ||
| ACK output valid time | tVD;ACK | 130 | ns | Hs-mode | 15 | ||
| Bus free before new transmission | tBUF | 500 | ns | Fast-mode Plus (Fm+) | 15 | ||
| Bus free before new transmission | tBUF | 300 | ns | Hs-mode | 15 | ||
| Input rise time | tR | 120 | ns | Fast-mode Plus (Fm+) | 15 | ||
| Input rise time | tR | 10 | 80 | ns | Hs-mode | 15 | |
| Output fall time from VIH min to VIL max | tOF | 120 | ns | Fast-mode Plus (Fm+) | 15 | ||
| Output fall time from VIH min to VIL max | tOF | 80 | ns | Hs-mode | 15 | ||
| Thermal resistance, junction to ambient | θJA | 146 | °C/W | 8-pin SOIC; EIA/JESD51 | 14 | ||
| Thermal resistance, junction to case | θJC | 48 | °C/W | 8-pin SOIC | 14 |
CAD (KiCad official)
- Symbol:
FM24V01A-GTR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
fm24v01a-gtr-etched.step/fm24v01a-gtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fm24v01a-gtr.step/fm24v01a-gtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Cypress Semicon datasheet (22 pp, sha256
628863541ffe35eb, retrieved 2026-10-21, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).