component
UCC2813QDR-2Q1
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC2813QDR-2Q1
Texas Instruments · AC-DC Controllers And Regulators · SOIC-8
UCC2813QDR-2Q1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | COMP is the error amplifier output and the PWM comparator input, with feedback loop compensation applied between this pin and FB. |
| 2 | FB | input | FB is the inverting input of the error amplifier; keep the FB lead short and its stray capacitance small for best stability. |
| 3 | CS | input | CS is the input to the current-sense comparators (PWM and overcurrent), connected directly to the MOSFET source sense resistor, with a 100 ns leading-edge blanking interval and a 1.55 V typical overcurrent threshold. |
| 4 | RC | input | RC is the oscillator timing pin, where an external resistor (from REF) and capacitor (to GND) set the switching frequency (up to 1 MHz) and maximum duty cycle; recommended RT is 10 kΩ to 200 kΩ and CT is 100 pF to 1000 pF, and RT must never be below 10 kΩ. |
| 5 | GND | power_in | GND is the reference and power ground for all device functions and should be separated from the high-current gate driver return path. |
| 6 | OUT | output | OUT is the high-current power driver output for the power MOSFET gate, rated for peak current up to ±1 A, and is actively held low when VCC is below the UVLO threshold. |
| 7 | VCC | power_in | VCC is the bias supply input, with an absolute maximum of 12 V (recommended maximum 11 V from a low-impedance source, 30 mA absolute maximum ICC) and an internal zener clamp near 13.5 V, and requires a series current-limiting resistor and a 0.1 µF ceramic bypass to GND. |
| 8 | REF | power_out | REF is the 5 V voltage reference output for the UCC2813-2-Q1 (±1.5% at 25°C), limited to 5 mA output current, and requires at least a 0.1 µF ceramic bypass to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
UCC2813QDR-2Q1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc2813qdr-2q1-etched.step/ucc2813qdr-2q1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc2813qdr-2q1.step/ucc2813qdr-2q1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (47 pp, sha256
114dd59e68535e9e, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).