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Contents

README

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TP2N7002ET1G

TECH PUBLIC · MOSFETs · SOT-23

TP2N7002ET1G from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; the pin is not numbered in the pinout picture, but it sits at the bottom-left position that the outline drawing marks as pin 1, and the gate-source voltage limit is ±20 V.
2 S passive Source; the pin is not numbered in the pinout picture, but it sits at the bottom-right position that the outline drawing marks as pin 2, and the continuous drain current is 0.3 A at TA=25°C.
3 D passive Drain; the pin is not numbered in the pinout picture, but it sits at the single top position that the outline drawing marks as pin 3, and the drain-source voltage limit is 60 V.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: TP2N7002ET1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: tp2n7002et1g-etched.step / tp2n7002et1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp2n7002et1g.step / tp2n7002et1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (3 pp, sha256 c8dd95c8011f2a00, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF