component
TPL903233-S5TR
Public Made by Adomby adom
3PEAK Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownTPL903233-S5TR
3PEAK · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
TPL903233-S5TR from 3PEAK, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input voltage pin, operating over 1.75 V to 5.5 V; bypass IN to GND with a 1 μF or greater capacitor. |
| 2 | GND | power_in | Ground reference pin; connect the GND pin directly to the PCB ground plane. |
| 3 | EN | input | Active-high regulator enable: drive high to turn the regulator on and low to turn it off (VIH 1.2 V to VIN, VIL 0 V to 0.4 V); connect to IN for automatic startup. |
| 4 | NC | unconnected | No connection. |
| 5 | OUT | output | Regulated output voltage pin (0.9 V to 5 V for this fixed version, 3.3 V for TPL903233); bypass OUT to GND with a 1 μF or greater capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 3PEAK |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Supply Voltage range | VIN | 1.75 | 5.5 | V | 7 | ||
| Output Voltage Accuracy | VOUT | -2 | 2 | % | −40°C ≤ TJ ≤ +125°C, 0 mA ≤ IOUT ≤ 300 mA | 7 | |
| EN Logic-input High Level (Output Enable) | VIH(EN) | 1.2 | V | Output Enable | 7 | ||
| EN Logic-input Low Level (Output Disable) | VIL(EN) | 0 | 0.4 | V | Output Disable | 7 | |
| EN Pin Leakage Current | IEN | 1 | 2 | µA | VEN = 5 V | 7 | |
| Shutdown Current | ISHDN | 0.02 | 2 | µA | EN = GND | 7 | |
| Dropout Voltage | VDO | 80 | 180 | mV | VOUT = 3.3 V, IOUT = 300 mA | 7 | |
| Output Current | IOUT | 0 | 300 | mA | VOUT in regulation | 7 | |
| Output Current Limit | ICL | 500 | 800 | mA | VOUT = 0.9 × VOUT(NOM) | 7 | |
| Ground Pin Current | IGND | 120 | µA | IOUT = 0 mA | 7 | ||
| Line Regulation | ΔVOUT | 1 | mV | VIN = VOUT(NOM) + 1 V to 5.5 V | 7 | ||
| Load Regulation | ΔVOUT | 5 | mV | VIN = VOUT(NOM) + 1 V, IOUT = 1 mA to 300 mA | 7 | ||
| Dropout Voltage | VDO | 28 | mV | VOUT = 3.3 V, IOUT = 100 mA | 7 | ||
| Short-circuit Current Limit | ISC | 100 | mA | RLOAD = 20 mΩ, TA = 25°C | 7 | ||
| Active Output Discharge Resistance | RDIS | 290 | Ω | VEN < VIL(EN) | 7 | ||
| Power Supply Rejection Ratio | PSRR | 82.1 | dB | IOUT = 20 mA, f = 100 Hz | 7 | ||
| Power Supply Rejection Ratio | PSRR | 81.9 | dB | IOUT = 20 mA, f = 1 kHz | 7 | ||
| Power Supply Rejection Ratio | PSRR | 87.9 | dB | IOUT = 20 mA, f = 10 kHz | 7 | ||
| Power Supply Rejection Ratio | PSRR | 61.4 | dB | IOUT = 20 mA, f = 100 kHz | 7 | ||
| Power Supply Rejection Ratio | PSRR | 44.7 | dB | IOUT = 20 mA, f = 1 MHz | 7 | ||
| Output Noise Voltage | VN | 8.6 | μVRMS | IOUT = 150 mA, BW = 10 Hz to 100 kHz | 7 | ||
| Start-up Time | tSTR | 750 | μs | VOUT reaches 95% of nominal output voltage after EN = high | 7 | ||
| Thermal Shutdown Temperature | TSD | 165 | ºC | 7 | |||
| Thermal Shutdown Hysteresis | 15 | ºC | 7 | ||||
| IN Supply Voltage (recommended) | IN | 1.75 | 5.5 | V | 6 | ||
| EN | EN | 0 | V | 6 | |||
| OUT | OUT | 0 | 5.5 | V | 6 | ||
| COUT | COUT | 1 | 10 | µF | 6 | ||
| ESR of COUT | ESR | 0.001 | 0.1 | Ω | 6 | ||
| TJ Junction Temperature Range | TJ | -40 | 125 | °C | 6 | ||
| PD Power Dissipation | PD | 0 | 400 | mW | 6 | ||
| IN, EN | -0.3 | 6 | V | Voltages with respect to GND | 6 | ||
| OUT | -0.3 | 6 | V | Voltage with respect to GND | 6 | ||
| TJ Junction Temperature Range | TJ | -40 | 150 | °C | 6 | ||
| TSTG Storage Temperature Range | TSTG | -65 | 150 | °C | 6 | ||
| TL Lead Temperature (Soldering 10 sec) | TL | 260 | °C | Soldering 10 sec | 6 | ||
| Junction-to-ambient thermal resistance | θJA | 280 | °C/W | SOT23-5 package | 6 | ||
| Junction-to-case thermal resistance | θJC | 62 | °C/W | SOT23-5 package | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor connection, the IN pin, and the GND pin of the system must be as small as possible. • It is recommended to use wide and thick copper to minimize I×R drop and heat dissipation. | 13 |
CAD (KiCad official)
- Symbol:
TPL903233-S5TR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tpl903233-s5tr-etched.step/tpl903233-s5tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpl903233-s5tr.step/tpl903233-s5tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 3PEAK datasheet (22 pp, sha256
5717499ceb17ed20, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).