TSC101BILT from STMicroelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Out	output	Output voltage, proportional to the magnitude of the sense voltage Vp-Vm; the output is buffered.
2	Gnd	power_in	Ground line.
3	Vp	input	Connection for the external sense resistor; the measured current enters the shunt on the Vp side.
4	Vm	input	Connection for the external sense resistor; the measured current exits the shunt on the Vm side.
5	Vcc	power_in	Positive power supply line.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	SOT-23-5
Category	Amplifiers/Comparators
Pins	5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Total supply current	ICC		165	300	µA	Vsense = 0 V; Tmin < Tamb < Tmax	4
Common mode rejection	CMR	90	105		dB	2.8 V < Vicm < 30 V; Tmin < Tamb < Tmax	4
Supply voltage rejection	SVR	90	105		dB	4.0 V < VCC < 24 V; Vsense = 30 mV; Tmin < Tamb < Tmax	4
Input offset voltage	Vos	-0.9	0.2	0.9	mV	Tamb = 25°C	4
Input offset voltage	Vos	-2.3	1.5	2.3	mV	Tmin < Tamb < Tmax	4
Input offset drift vs. T	dVos/dT		-3		µV/°C	Tmin < Tamb < Tmax	4
Input leakage current	Ilk			1	µA	VCC = 0 V; Tmin < Tamb < Tmax	4
Input bias current	Iib		5.5	8	µA	Vsense = 0 V; Tmin < Tamb < Tmax	4
Gain	Av		50		V/V		5
Gain accuracy	ΔAv	-2.5		2.5	%	Tamb = 25°C	5
Gain accuracy	ΔAv	-4.5		4.5	%	Tmin < Tamb < Tmax	5
Output voltage drift vs. T	ΔVout/ΔT			0.4	mV/°C	Tmin < Tamb < Tmax	5
Output stage load regulation	ΔVout/ΔIout		3	4	mV/mA	-10 mA < Iout < 10 mA; Iout sink or source current	5
Total output voltage accuracy	ΔVout	-2.5		2.5	%	Vsense = 50 mV; Tamb = 25°C	5
Total output voltage accuracy	ΔVout	-4.5		4.5	%	Vsense = 50 mV; Tmin < Tamb < Tmax	5
Total output voltage accuracy	ΔVout	-3.5		3.5	%	Vsense = 100 mV; Tamb = 25°C	5
Total output voltage accuracy	ΔVout	-5		5	%	Vsense = 100 mV; Tmin < Tamb < Tmax	5
Total output voltage accuracy	ΔVout	-8		8	%	Vsense = 20 mV; Tamb = 25°C	5
Total output voltage accuracy	ΔVout	-11		11	%	Vsense = 20 mV; Tmin < Tamb < Tmax	5
Total output voltage accuracy	ΔVout	-15		15	%	Vsense = 10 mV; Tamb = 25°C	5
Total output voltage accuracy	ΔVout	-20		20	%	Vsense = 10 mV; Tmin < Tamb < Tmax	5
Short-circuit sink current	Isc-sink		30	60	mA	Out connected to VCC; Vsense = -1 V	5
Short-circuit source current	Isc-source		15	26	mA	Out connected to Gnd; Vsense = 1 V	5
Output stage high-state saturation voltage	Voh		0.8	1	V	Voh = VCC-Vout; Vsense = 1 V; Iout = 1 mA	5
Output stage low-state saturation voltage	Vol		50	100	mV	Vsense = -1 V; Iout = 1 mA	5
Output settling to 1% final value	ts		6		µs	Vsense = 10 mV to 100 mV; Cload = 47 pF	6
Slew rate	SR	0.55	0.9		V/µs	Vsense = 10 mV to 100 mV	6
3dB bandwidth	BW		670		kHz	Cload = 47 pF; Vsense = 100 mV	6
Total output voltage noise			50		nV/√Hz		6
DC supply voltage from Tmin to Tmax	VCC	4		24	V	DC supply voltage from Tmin to Tmax	3
Operational temperature range (Tmin to Tmax)	Toper	-40		125	°C		3
Common mode voltage range	Vicm	2.8		30	V		3
Input pins differential voltage (Vp-Vm)	Vid	-60		60	V		3
Input pin voltages (Vp and Vm)	Vi	-0.3		60	V	Measured with respect to ground pin	3
DC supply voltage	VCC	-0.3		25	V		3
DC output pin voltage	Vout	-0.3			V	Upper limit is VCC	3
Storage temperature	Tstg	-55		150	°C		3
Maximum junction temperature	Tj			150	°C		3
SOT23-5 thermal resistance junction to ambient	Rthja		250		°C/W	SOT23-5 junction to ambient	3
ESD human body model	HBM			2.5	kV	Human body model	3
ESD machine model	MM			150	V	Machine model	3
ESD charged device model	CDM			1.5	kV	Charged device model	3

CAD (KiCad official)

Symbol: TSC101BILT
Footprint: Package_TO_SOT_SMD:SOT-23-5
3D model: SOT-23-5 (KiCad packages3D, STEP)
3D model files: tsc101bilt-etched.step / tsc101bilt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tsc101bilt.step / tsc101bilt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (18 pp, sha256 509e5d9719d623cb, retrieved 2026-11-06, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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TSC101BILT

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3D Model

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