AD5262BRUZ200-RL7 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SDO	output	Serial Data Output; open-drain transistor requires a pull-up resistor.
2	A1	passive	A terminal of RDAC 1.
3	W1	passive	Wiper of RDAC 1, address A0 = 0.
4	B1	passive	B terminal of RDAC 1.
5	VDD	power_in	Positive power supply, specified for operation at both 5 V or 15 V (sum of
6	SHDN	input	Active-low shutdown input; opens terminal A and controls variable Resistor 1 through Resistor R2.
7	CLK	input	Serial clock input, positive edge triggered.
8	SDI	input	Serial data input.
9	CS	input	Active-low chip select; when CS returns high, the serial input register data is decoded based on address bit A0 and loaded into the target RDAC register.
10	PR	input	Active-low preset to midscale; sets RDAC registers to 0x80.
11	GND	power_in	Ground.
12	VSS	power_in	Negative power supply, specified for operation at either 0 V or −5 V (sum of
13	VL	power_in	Logic supply voltage; must be the same voltage as the digital logic controlling the AD5262.
14	B2	passive	B terminal of RDAC 2.
15	W2	passive	Wiper of RDAC 2, address A0 = 1.
16	A2	passive	A terminal of RDAC 2.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	TSSOP-16
Category	Data Converters
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Resistor Differential Nonlinearity	R-DNL	-1		1	LSB	RWB, VA = no connect	3
Resistor Nonlinearity	R-INL	-1		1	LSB	RWB, VA = no connect	3
Nominal Resistor Tolerance	ΔRAB	-30		30	%	TA = 25°C	3
Wiper Resistance	RW		60	150	Ω	IW = 1 V/RAB	3
Differential Nonlinearity	DNL	-1		1	LSB		3
Integral Nonlinearity	INL	-1		1	LSB		3
Full-Scale Error	WFSE	-2	-1	0	LSB	Code = full scale	3
Zero-Scale Error	VWZSE	0	1	2	LSB	Code = zero scale	3
Common-Mode Leakage Current	ICM			1	nA	VA = VB = VDD/2	3
Shutdown Current	ISHDN			5	μA		3
Input Logic High	VIH	2.4			V		3
Input Logic Low	VIL			0.8	V		3
Input Logic High	VIH	2.1			V	VL = 3 V, VSS = 0 V	3
Input Logic Low	VIL			0.6	V	VL = 3 V, VSS = 0 V	3
Output Logic High (SDO)	VOH	4.9			V	RPULL-UP = 2 kΩ to 5 V	3
Output Logic Low (SDO)	VOL			0.4	V	IOL = 1.6 mA, VLOGIC = 5 V	3
Input Current	IIL	-1		1	μA	VIN = 0 V or 5 V	3
Logic Supply	VL	2.7		5.5	V		3
Power Single-Supply Range	VDD RANGE	4.5		16.5	V	VSS = 0 V	3
Power Dual-Supply Range (±)	VDD/SS RANGE	4.5		5.5	V	printed as ±4.5 to ±5.5	3
Logic Supply Current	IL			60	μA	VL = 5 V	3
Positive Supply Current	IDD			1	μA	VIH = 5 V or VIL = 0 V	3
Negative Supply Current	ISS			1	μA	VSS = -5 V	3
Power Dissipation	PDISS			0.3	mW	VIH = 5 V or VIL = 0 V, VDD = +5 V, VSS = -5 V	3
Power Supply Sensitivity	PSS		0.003	0.01	%/%	ΔVDD = +5 V, ±10%	3
CLK to SDO Propagation Delay	tPD			160	ns	RL = 1 kΩ, CL< 20 pF	4
Clock Frequency	fCLK			25	MHz		4
Input Clock Pulse Width	tCH, tCL	20			ns	Clock level high or low	4
Data Setup Time	tDS	10			ns		4
Data Hold Time	tDH	10			ns		4
CS Setup Time	tCSS	5			ns		4
CS High Pulse Width	tCSW	20			ns		4
Reset Pulse Width	tRS	50			ns		4
CLK Fall to CS Rise Hold Time	tCSH	0			ns		4
CS Rise to Clock Rise Setup	tCS1	10			ns		4
Nominal Resistance A-to-B	RAB		200		kΩ	200 kΩ version (suffix 200)	16
Resistance Temperature Coefficient	ΔRAB/ΔT		35		ppm/°C	Wiper = no connect	3
Resistance Drift	ΔRAB		0.05		%		3
Channel Resistance Matching	ΔRWB/RWB		0.1		%	Channel 1 and Channel 2 RWB, DX = 0x80	3
Resolution	N		8		Bits		3
Voltage Divider Temperature Coefficient	ΔVW/ΔT		5		ppm/°C	Code = half scale	3
Ax and Bx Capacitance	CA,B		25		pF	f = 5 MHz, measured to GND, code = half scale	3
Wx Capacitance	CW		55		pF	f = 1 MHz, measured to GND, code = half scale	3
Input Capacitance	CIL		5		pF		3
Bandwidth -3 dB	BW		30		kHz	RAB = 20 kΩ/50 kΩ/200 kΩ: 310/130/30	4
Analog Crosstalk	CTA		-64		dB	RAB = 20 kΩ/200 kΩ, VW2 = 5 V p-p at f = 10 kHz	4
Crosstalk	CT		1		nV-sec	VA = VDD, VB = 0 V, adjacent RDAC full-scale code change	4
Resistor Noise Voltage	eN_WB		13		nV/√Hz	RWB = 20 kΩ, f = 1 kHz	4
VDD to GND	VDD	-0.3		17	V	TA = 25°C	6
VSS to GND	VSS	-7		0	V	TA = 25°C	6
VDD to VSS	VDD-VSS			17	V	TA = 25°C	6
VL to GND	VL	0		7	V	TA = 25°C	6
Digital Inputs and Output Voltage to GND		-0.3		7	V	-0.3 V to VL + 0.3 V, or +7 V (whichever is less)	6
AX to BX, AX to WX, BX to WX Intermittent		-20		20	mA	Intermittent	6
AX to BX, AX to WX, BX to WX Continuous		-5		5	mA	Continuous	6
Operating Temperature Range		-40		85	°C		6
Maximum Junction Temperature	TJ MAX			150	°C		6
Storage Temperature Range		-65		150	°C		6
Lead Temperature (Soldering, 10 sec)				300	°C		6
Thermal Resistance 16-Lead TSSOP	θJA		150		°C/W	16-Lead TSSOP	6

CAD (KiCad official)

Symbol: AD5262BRUZ200-RL7
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)
3D model files: ad5262bruz200-rl7-etched.step / ad5262bruz200-rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5262bruz200-rl7.step / ad5262bruz200-rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (24 pp, sha256 93bd7a53f517e1a0, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD5262BRUZ200-RL7

Verified AD5262BRUZ200-RL7

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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