component
LP2989IMMX-5.0
Public Made by Adomby adom
Texas Instruments Linear Voltage Regulators (LDO), VSSOP-8-0.65mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownLP2989IMMX-5.0
Texas Instruments · Linear Voltage Regulators (LDO) · VSSOP-8-0.65mm
LP2989IMMX-5.0 from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BYPASS | input | Bypass capacitor input used to add an external noise-reduction capacitor. |
| 2 | N/C | unconnected | Reserved for post-packaging test and calibration; must be left floating and not connected to any potential. |
| 3 | GROUND | power_in | Ground reference pin for the regulator. |
| 4 | INPUT | power_in | Regulator power input. |
| 5 | OUTPUT | power_out | Regulated output voltage. |
| 6 | SENSE | input | Feedback voltage sense input. |
| 7 | ERROR | output | Error signal output. |
| 8 | SHUTDOWN | input | Shutdown input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8-0.65mm |
| Category | Power Supply Chip |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage tolerance | VOUT | -1.25 | 1.25 | %VNOM | 1 mA < IOUT < 500 mA, VOUT(NOM) + 1 V ≤ VIN ≤ 16 V | 5 | |
| Output voltage tolerance | VOUT | -2.5 | 2.5 | %VNOM | 1 mA < IOUT < 500 mA, VOUT(NOM) + 1 V ≤ VIN ≤ 16 V | 5 | |
| Output voltage tolerance | VOUT | -5 | 3.5 | %VNOM | 1 mA < IOUT < 500 mA, VOUT(NOM) + 1 V ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 5 | |
| Output voltage tolerance | VOUT | -4.5 | 3.5 | %VNOM | 1 mA < IOUT < 500 mA, VOUT(NOM) + 1 V ≤ VIN ≤ 16 V, -25°C ≤ TJ ≤ 125°C | 5 | |
| Output voltage line regulation | ΔVOUT/ΔVIN | 0.005 | 0.014 | %/V | VOUT(NOM) + 1 V ≤ VIN ≤ 16 V | 5 | |
| Output voltage line regulation | ΔVOUT/ΔVIN | 0.005 | 0.032 | %/V | VOUT(NOM) + 1 V ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 5 | |
| Dropout voltage | VIN, VOUT | 1 | 3 | mV | IOUT = 100 µA | 5 | |
| Dropout voltage | VIN, VOUT | 1 | 4 | mV | IOUT = 100 µA, -40°C ≤ TJ ≤ 125°C | 5 | |
| Dropout voltage | VIN, VOUT | 150 | 200 | mV | IOUT = 200 mA | 5 | |
| Dropout voltage | VIN, VOUT | 150 | 300 | mV | IOUT = 200 mA, -40°C ≤ TJ ≤ 125°C | 5 | |
| Dropout voltage | VIN, VOUT | 310 | 425 | mV | IOUT = 500 mA | 5 | |
| Dropout voltage | VIN, VOUT | 310 | 650 | mV | IOUT = 500 mA, -40°C ≤ TJ ≤ 125°C | 5 | |
| Ground pin current | IGND | 110 | 175 | µA | IOUT = 100 µA | 6 | |
| Ground pin current | IGND | 110 | 200 | µA | IOUT = 100 µA, -40°C ≤ TJ ≤ 125°C | 6 | |
| Ground pin current | IGND | 1 | 2 | mA | IOUT = 200 mA | 6 | |
| Ground pin current | IGND | 1 | 3.5 | mA | IOUT = 200 mA, -40°C ≤ TJ ≤ 125°C | 6 | |
| Ground pin current | IGND | 3 | 6 | mA | IOUT = 500 mA | 6 | |
| Ground pin current | IGND | 3 | 9 | mA | IOUT = 500 mA, -40°C ≤ TJ ≤ 125°C | 6 | |
| Ground pin current in shutdown | IGND | 0.05 | 0.8 | µA | VSD < 0.4 V | 6 | |
| Ground pin current in shutdown | IGND | 0.5 | 2 | µA | VSD < 0.18 V, -40°C ≤ TJ ≤ 125°C | 6 | |
| Peak output current | IOUT(PK) | 600 | 800 | mA | VOUT ≥ VOUT(NOM) − 5% | 6 | |
| Short circuit current | IOUT(MAX) | 1000 | mA | RL = 0 (Steady State) | 6 | ||
| Output noise voltage | en | 18 | µV(RMS) | BW = 100 Hz to 100 kHz, COUT = 10 µF, CBYPASS = .01 µF, VOUT = 2.5 V | 6 | ||
| Ripple rejection | ΔVOUT/ΔVIN | 60 | dB | f = 1 kHz, COUT = 10 µF | 6 | ||
| Output voltage temperature coefficient | ΔVOUT/ΔTD | 20 | ppm/°C | -40°C ≤ TJ ≤ 125°C | 6 | ||
| SD input voltage (output ON) | VSD | 1.4 | V | VH = Output ON | 6 | ||
| SD input voltage (output ON) | VSD | 1.6 | V | VH = Output ON, -40°C ≤ TJ ≤ 125°C | 6 | ||
| SD input voltage (output OFF) | VSD | 0.5 | V | VL = Output OFF | 6 | ||
| SD input voltage (output OFF) | VSD | 0.18 | V | VL = Output OFF, IIN ≤ 2 µA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| Output HIGH leakage | IOH | 0.001 | 1 | µA | VOH = 16 V | 6 | |
| Output HIGH leakage | IOH | 0.001 | 2 | µA | VOH = 16 V, -40°C ≤ TJ ≤ 125°C | 6 | |
| Output LOW voltage | VOL | 150 | 220 | mV | VIN = VOUT(NOM) − 0.5 V, IOUT(COMP) = 150 µA | 6 | |
| Output LOW voltage | VOL | 150 | 350 | mV | VIN = VOUT(NOM) − 0.5 V, IOUT(COMP) = 150 µA, -40°C ≤ TJ ≤ 125°C | 6 | |
| Upper threshold voltage | VTHR(MAX) | -6 | -4.8 | -3.5 | %VOUT | 6 | |
| Upper threshold voltage | VTHR(MAX) | -8.3 | -4.8 | -2.5 | %VOUT | -40°C ≤ TJ ≤ 125°C | 6 |
| Lower threshold voltage | VTHR(MIN) | -8.9 | -6.6 | -4.9 | %VOUT | 6 | |
| Lower threshold voltage | VTHR(MIN) | -13 | -6.6 | -3 | %VOUT | -40°C ≤ TJ ≤ 125°C | 6 |
| Hysteresis | HYST | 2 | %VOUT | 6 | |||
| Operating junction temperature | TJ | -40 | 125 | °C | Operating junction temperature | 5 | |
| Operating input supply voltage | VIN | 2.1 | 16 | V | Operating input supply voltage | 5 | |
| Junction temperature | TJ | -40 | 125 | °C | Operating junction temperature | 4 | |
| Input supply voltage survival | VIN | -0.3 | 16 | V | Survival | 4 | |
| SENSE pin voltage | VSENSE | -0.3 | 6 | V | SENSE pin | 4 | |
| Output voltage survival | VOUT | -0.3 | 16 | V | Survival | 4 | |
| Input-output voltage survival | VIN-VOUT | -0.3 | 16 | V | Survival | 4 | |
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 156.5 | °C/W | High-K, VSSOP (DGK) 8 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 51 | °C/W | VSSOP (DGK) 8 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 76.5 | °C/W | VSSOP (DGK) 8 pins | 5 | ||
| Junction-to-top characterization parameter | ψJT | 4.9 | °C/W | VSSOP (DGK) 8 pins | 5 | ||
| Junction-to-board characterization parameter | ψJB | 75.2 | °C/W | VSSOP (DGK) 8 pins | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is stron | 20 |
CAD (KiCad official)
- Symbol:
LP2989IMMX-5.0 - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)
- 3D model files:
lp2989immx-5-0-etched.step/lp2989immx-5-0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp2989immx-5-0.step/lp2989immx-5-0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
892c9df768fa0ee8, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).