component
UC2843BDR2G
Public Made by Adomby adom
onsemi AC-DC Controllers And Regulators, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUC2843BDR2G
onsemi · AC-DC Controllers And Regulators · SOIC-14
UC2843BDR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Compensation | output | Error amplifier output made available for loop compensation (Vcomp rated -0.3 to +7.2 V, error amp output sink current max 10 mA). |
| 2 | NC | unconnected | No connection; pin is not internally connected. |
| 3 | Voltage Feedback | input | Inverting input of the error amplifier, normally connected to the power supply output through a resistor divider (-0.3 to +5.5 V). |
| 4 | NC | unconnected | No connection; pin is not internally connected. |
| 5 | Current Sense | input | Input for a voltage proportional to inductor current, used by the PWM to terminate output switch conduction (-0.3 to +5.5 V). |
| 6 | NC | unconnected | No connection; pin is not internally connected. |
| 7 | RT/CT | passive | Oscillator frequency and maximum output duty cycle are set by resistor RT to Vref and capacitor CT to ground, operation to 500 kHz possible. |
| 8 | Power Ground | power_in | Separate power ground return connected back to the power source, used to reduce switching transient noise effects on the control circuitry. |
| 9 | GND | power_in | Control circuitry ground return, connected back to the power source ground. |
| 10 | Output | output | Directly drives the gate of a power MOSFET, sourcing and sinking peak currents up to 1.0 A. |
| 11 | VC | power_in | Output stage supply that sets the output high state (VOH); a separate source connection reduces switching noise on the control circuitry (max 30 V). |
| 12 | VCC | power_in | Positive supply of the control IC (maximum 30 V). |
| 13 | NC | unconnected | No connection; pin is not internally connected. |
| 14 | Vref | power_out | 5.0 V reference output that provides charging current for capacitor CT through resistor RT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Output Voltage (IO = 1.0 mA, TJ = 25°C) | Vref | 4.95 | 5 | 5.05 | V | IO = 1.0 mA, TJ = 25°C | 3 |
| Line Regulation | Regline | 2 | 20 | mV | VCC = 12 V to 25 V | 3 | |
| Load Regulation | Regload | 3 | 25 | mV | IO = 1.0 mA to 20 mA | 3 | |
| Total Output Variation over Line, Load, and Temperature | Vref | 4.9 | 5.1 | V | Over line, load and temperature (UC284XB row) | 3 | |
| Output Short Circuit Current | ISC | -30 | -85 | -180 | mA | 3 | |
| Oscillator Frequency (TJ = 25°C) | fOSC | 49 | 52 | 55 | kHz | TJ = 25°C | 3 |
| Oscillator Frequency (TA = Tlow to Thigh) | fOSC | 48 | 56 | kHz | TA = Tlow to Thigh | 3 | |
| Oscillator Frequency (RT = 6.2 k, CT = 1.0 nF) | fOSC | 225 | 250 | 275 | kHz | TJ = 25°C (RT = 6.2 k, CT = 1.0 nF) | 3 |
| Frequency Change with Voltage | fOSC/V | 0.2 | 1 | % | VCC = 12 V to 25 V | 3 | |
| Discharge Current (TJ = 25°C) | Idischg | 7.8 | 8.3 | 8.8 | mA | VOSC = 2.0 V, TJ = 25°C | 3 |
| Discharge Current (TA = Tlow to Thigh) | Idischg | 7.5 | 8.8 | mA | VOSC = 2.0 V, TA = Tlow to Thigh | 3 | |
| Voltage Feedback Input | VFB | 2.45 | 2.5 | 2.55 | V | VO = 2.5 V | 3 |
| Input Bias Current (error amplifier) | IIB | -0.1 | -1 | µA | VFB = 5.0 V | 3 | |
| Open Loop Voltage Gain | AVOL | 65 | 90 | dB | VO = 2.0 V to 4.0 V | 3 | |
| Unity Gain Bandwidth | BW | 0.7 | 1 | MHz | TJ = 25°C | 3 | |
| Power Supply Rejection Ratio (error amplifier) | PSRR | 60 | 70 | dB | VCC = 12 V to 25 V | 3 | |
| Output Current Sink | ISink | 2 | 12 | mA | VO = 1.1 V, VFB = 2.7 V | 3 | |
| Output Current Source | ISource | -0.5 | -1 | mA | VO = 5.0 V, VFB = 2.3 V | 3 | |
| Output Voltage High State | VOH | 5 | 6.2 | V | RL = 15 k to ground, VFB = 2.3 V | 3 | |
| Output Voltage Low State | VOL | 0.8 | 1.1 | V | RL = 15 k to Vref, VFB = 2.7 V | 3 | |
| Current Sense Input Voltage Gain | AV | 2.85 | 3 | 3.15 | V/V | Notes 5 and 6 | 4 |
| Maximum Current Sense Input Threshold | Vth | 0.9 | 1 | 1.1 | V | Note 5 | 4 |
| Input Bias Current (current sense) | IIB | -2 | -10 | µA | 4 | ||
| Propagation Delay (Current Sense Input to Output) | tPLH(In/Out) | 150 | 300 | ns | 4 | ||
| Output Voltage Low State (ISink = 20 mA) | VOL | 0.1 | 0.4 | V | ISink = 20 mA | 4 | |
| Output Voltage Low State (ISink = 200 mA) | VOL | 1.6 | 2.2 | V | ISink = 200 mA | 4 | |
| Output Voltage High State (ISource = 20 mA) | VOH | 13 | 13.5 | V | ISource = 20 mA | 4 | |
| Output Voltage High State (ISource = 200 mA) | VOH | 12 | 13.4 | V | ISource = 200 mA | 4 | |
| Output Voltage with UVLO Activated | VOL(UVLO) | 0.1 | 1.1 | V | VCC = 6.0 V, ISink = 1.0 mA | 4 | |
| Output Voltage Rise Time | tr | 50 | 150 | ns | CL = 1.0 nF, TJ = 25°C | 4 | |
| Output Voltage Fall Time | tf | 50 | 150 | ns | CL = 1.0 nF, TJ = 25°C | 4 | |
| Startup Threshold (VCC), UCX843B row | Vth | 7.8 | 8.4 | 9 | V | UCX843B, BV, D row | 4 |
| Minimum Operating Voltage After Turn-On (VCC), UCX843B row | VCC(min) | 7 | 7.6 | 8.2 | V | UCX843B, BV, D row | 4 |
| Duty Cycle Maximum | DC(max) | 94 | 96 | % | UC284XB, UC384XB, UC2843D | 4 | |
| Duty Cycle Minimum | DC(min) | 0 | % | 4 | |||
| Power Supply Current Startup (VCC = 6.5 V, UCX843B row) | ICC + IC | 0.3 | 0.5 | mA | Startup, VCC = 6.5 V for UCX843B, UC2843D | 4 | |
| Power Supply Zener Voltage | VZ | 30 | 36 | V | ICC = 25 mA | 4 | |
| Bias and Driver Voltages (VCC, VC) | VCC, VC | 30 | V | Zero series impedance, see also Total Device spec | 2 | ||
| Total Power Supply and Zener Current | ICC + IZ | 30 | mA | 2 | |||
| Output Current, Source or Sink | IO | 1 | A | Source or sink | 2 | ||
| Output Energy (Capacitive Load per Cycle) | W | 5 | J | Capacitive load per cycle | 2 | ||
| Current Sense, Voltage Feedback, Vref and RT/CT Inputs | Vin | -0.3 | 5.5 | V | 2 | ||
| Compensation | Vcomp | -0.3 | 7.2 | V | 2 | ||
| Output | Vo | -0.3 | V | Max VCC or VC + 0.3 V | 2 | ||
| Error Amp Output Sink Current | IO | 10 | mA | 2 | |||
| Maximum Power Dissipation @ TA = 25°C (D suffix SOIC-14) | PD | 862 | mW | D suffix, plastic package, SOIC-14, TA = 25°C | 2 | ||
| Thermal Resistance, Junction-to-Air (D suffix SOIC-14) | RJA | 145 | °C/W | D suffix, plastic package, SOIC-14 | 2 | ||
| Operating Junction Temperature | TJ | 150 | °C | 2 | |||
| Operating Ambient Temperature (UC2842B, UC2843B) | TA | -25 | 85 | °C | UC2842B, UC2843B | 2 | |
| Storage Temperature Range | Tstg | -65 | 150 | °C | 2 |
CAD (KiCad official)
- Symbol:
UC2843BDR2G - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
uc2843bdr2g-etched.step/uc2843bdr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);uc2843bdr2g.step/uc2843bdr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (25 pp, sha256
73ecc085414cb85f, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).