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Contents

README

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NCV84160DR2G

onsemi · Power Distribution Switches · SOIC-8

NCV84160DR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin; reverse ground pin current is rated at −200 mA maximum, and loss of ground holds the output OFF independent of the input.
2 IN input Logic-level control input, CMOS 3 V/5 V compatible, with VIN_LOW max 0.9 V, VIN_HIGH min 2.1 V, and absolute input voltage rated −10 V to 10 V (input current ±5 mA).
3 CS output Analog current sense output giving a current proportional to the load current (IOUT/K), rated at 200 mA CS current and a CS maximum voltage of 5 V with RCS = 10 kΩ at IOUT = 1 A.
4 CS_DIS input Active-high current sense disable input that turns off all diagnostic and current sense features, with VCS_DIS voltage rated −10 V to 10 V (current ±5 mA) and VCS_DIS_HIGH min 2.1 V.
5 VD power_in Supply voltage pin with operating range 4.5 V to 28 V and maximum DC supply voltage of 41 V.
6 OUT power_out Protected high-side switched output to the load, with DC output current limit of 6 A to 18 A at VD = 13 V and integrated inductive-load clamp (VD − 41 V to VD − 52 V).
7 OUT power_out Second output pin, electrically the same protected high-side switched output as pin 6 (datasheet lists both OUT pins together in Table 1).
8 VD power_in Second supply voltage pin, same supply function as pin 5 with operating range 4.5 V to 28 V and maximum DC supply voltage of 41 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage VD -0.3 41 V 4
Peak Transient Input Voltage Vpeak 48 V Load Dump 46 V, VD = 14 V, ISO16750-2: 2012 Test B 4
Input Voltage VIN -10 10 V 4
Input Current IIN -5 5 mA 4
Reverse Ground Pin Current IGND -200 mA 4
Output Current IOUT -6 A Note 2 4
CS Current ICS 200 mA 4
CS_DIS Voltage VCS_DIS -10 10 V 4
CS_DIS Current ICS_DIS -5 5 mA 4
Power Dissipation Ptot 1.49 W Tc = 25°C (Note 4) 4
Charge Device Model ESD VESD 750 V CDM-AEC-Q100-011 4
Single Pulse Inductive Load Switching Energy EAS 53.71 mJ L = 8 mH, Vbat = 13.5 V; IL = 3.08 A, TJ_Start = 150°C (Note 1) 4
Operating Junction Temperature TJ -40 150 °C 4
Storage Temperature Tstorage -55 150 °C 4
Thermal Resistance Junction-to-Lead RJL 32 °C/W 4
Thermal Resistance Junction-to-Ambient RJA 98 °C/W Note 3 (min. pad size, 1 oz. Cu) 4
Thermal Resistance Junction-to-Ambient RJA 84 °C/W Note 4 (2 cm2 pad size, 1 oz. Cu) 4
Operating Supply Voltage VD 4.5 28 V 8 ≤ VD ≤ 28 V; −40°C < TJ < 150°C (table header) 5
Undervoltage Shutdown VUV 3.5 4.5 V 5
On Resistance RON 160 m IOUT = 1 A, TJ = 25°C 5
On Resistance RON 320 m IOUT = 1 A, TJ = 150°C 5
On Resistance RON 210 m IOUT = 1 A, VD = 5 V, TJ = 25°C 5
Supply Current OFF-state ID 0.01 0.5 A OFF-state: VD = 13 V, VIN = VOUT = 0 V, TJ = 25°C 5
Supply Current ON-state ID 1.9 3.5 mA ON-state: VD = 13 V, VIN = 5 V, IOUT = 0 A 5
Output Leakage Current IL(OFF) 0.5 A VIN = VOUT = 0 V, VD = 13 V, TJ = 25°C 5
Input Voltage - Low VIN_LOW 0.9 V 5
Input Current - Low IIN_LOW 1 A VIN = 0.9 V 5
Input Voltage - High VIN_HIGH 2.1 V 5
Input Current - High IIN_HIGH 10 A VIN = 2.2 V 5
Input Clamp Voltage (positive) VIN_CL 12 13 14 V IIN = 1 mA 5
Input Clamp Voltage (negative) VIN_CL -14 -13 -12 V IIN = −1 mA 5
CS_DIS Current - Low ICS_DIS_LOW 1 A VCS_DIS = 0.9 V 5
CS_DIS Voltage - High VCS_DIS_HIGH 2.1 V 5
CS_DIS Current - High ICS_DIS_HIGH 10 A VCS_DIS = 2.2 V 5
CS_DIS Clamp Voltage (positive) VCS_DIS_CL 12 13 14 V ICS_DIS = 1 mA 5
CS_DIS Clamp Voltage (negative) VCS_DIS_CL -14 -13 -12 V ICS_DIS = −1 mA 5
Temperature Shutdown TSD 150 175 200 °C Note 7 6
DC Output Current Limit ILIM_H 6 12 18 A VD = 13 V 6
DC Output Current Limit ILIM_H 18 A 5 V < VD < 28 V 6
Overvoltage Protection VOV 41 45 52 V VIN = 0 V, ID = 20 mA 6
Output Voltage Drop Limitation VDS_ON 25 mV IOUT = 0.025 A, −40°C ≤ TJ ≤ 150°C 6
Open-load Off-State Detection Threshold VOL 2 4 V VIN = 0 V 6
Open-load On-State Detection Threshold IOL 0.5 5 mA VIN = 5 V, ICS = 5 A 6
Open-load Detection Delay at Turn-Off td_OL_off 100 800 s 6
Off-State Output Current IOLOFF1 -3 3 A VIN = 0 V, VOUT = VOL 6
Current Sense Ratio K0 K0 260 490 760 IOUT/ICS IOUT = 0.025 A, VCS = 0.5 V, TJ = −40°C to 150°C 7
Current Sense Ratio K1 K1 310 465 620 IOUT/ICS IOUT = 0.35 A, VCS = 0.5 V, TJ = −40°C to 150°C 7
Current Sense Ratio K1 K1 360 465 545 IOUT/ICS IOUT = 0.35 A, VCS = 0.5 V, TJ = 25°C to 150°C 7
Current Sense Ratio Drift K1 / K1 -11 11 % IOUT = 0.35 A, VCS = 0.5 V, TJ = −40°C to 150°C 7
Current Sense Ratio K2 K2 350 455 570 IOUT/ICS IOUT = 0.5 A, VCS = 4 V, TJ = −40°C to 150°C 7
Current Sense Ratio K2 K2 380 455 530 IOUT/ICS IOUT = 0.5 A, VCS = 4 V, TJ = 25°C to 150°C 7
Current Sense Ratio Drift K2 / K2 -8 8 % IOUT = 0.5 A, TJ = −40°C to 150°C 7
Current Sense Ratio K3 K3 405 455 505 IOUT/ICS IOUT = 1.5 A, VCS = 4 V, TJ = −40°C to 150°C 7
Current Sense Ratio K3 K3 415 455 495 IOUT/ICS IOUT = 1.5 A, VCS = 4 V, TJ = 25°C to 150°C 7
Current Sense Ratio Drift K3 / K3 -4 4 % IOUT = 1.5 A, TJ = −40°C to 150°C 7
CS_DIS Low to CS High Delay Time tCS_HIGH1 40 100 s VCS < 4 V, 0.025 A < IOUT < 1.5 A, ICS = 90% of ICS Max 7
CS_DIS High to CS Low Delay Time tCS_LOW1 5 20 s VCS < 4 V, 0.025 A < IOUT < 1.5 A, ICS = 10% of ICS Max 7
VIN High to CS High Delay Time tCS_HIGH2 30 160 s VCS < 4 V, 0.025 A < IOUT < 1.5 A, ICS = 90% of ICS Max 7
VIN Low to CS Low Delay Time tCS_LOW2 80 250 s VCS < 4 V, 0.025 A < IOUT < 1.5 A, ICS = 10% of ICS Max 7

CAD (KiCad official)

  • Symbol: NCV84160DR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ncv84160dr2g-etched.step / ncv84160dr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncv84160dr2g.step / ncv84160dr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (28 pp, sha256 afab0f744bbd83ee, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF