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Contents

README

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CPDT6-24V4-HF

Comchip · ESD And Surge Protection (TVS/ESD) · SOT-23-6

CPDT6-24V4-HF from Comchip, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IO1 passive Protected line 1 (diode cathode); working reverse voltage 24V max, breakdown 25V min at 1mA, clamping 47V max at IPP=1A (8/20us).
2 GND power_in Common anode connection of the ESD diodes, tied to ground in the internal schematic.
3 IO2 passive Protected line 2 (diode cathode); working reverse voltage 24V max, breakdown 25V min at 1mA, clamping 47V max at IPP=1A (8/20us).
4 IO3 passive Protected line 3 (diode cathode); working reverse voltage 24V max, ESD capability ±15kV air / ±8kV contact per IEC 61000-4-2.
5 GND power_in Common anode connection of the ESD diodes, tied to ground in the internal schematic.
6 IO4 passive Protected line 4 (diode cathode); working reverse voltage 24V max, junction capacitance 10pF typ at VR=0V, 1MHz.

Key specifications

Parameter Value
Manufacturer Comchip
Package SOT-23-6
Category Circuit Protection
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Peak pulse power PPP 47 W 1
Storage temperature range TSTG -55 150 °C 1
ESD capability 15 kV IEC 61000-4-2(air) 1
ESD capability 8 kV IEC 61000-4-2(contact) 1
Breakdown voltage VBR 25 V IT = 1mA 1
Reverse leakage current IR 2 uA VRWM = 24V 1
Clamping voltage VC 47 V IPP = 1A, TP = 8/20us 1
Working peak reverse voltage VRWM 24 V 1
Peak pulse current IPP 1 A TP = 8/20us 1
Junction capacitance CJ 10 pF VR = 0V, f = 1MHz 1

CAD (KiCad official)

  • Symbol: CPDT6-24V4-HF
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: cpdt6-24v4-hf-etched.step / cpdt6-24v4-hf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cpdt6-24v4-hf.step / cpdt6-24v4-hf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Comchip datasheet (4 pp, sha256 355065c0c9fb978b, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF